Display device and method of manufacturing the same

• US 9,601,524 B2
• Filed: 06/30/2015
• Issued: 03/21/2017
• Est. Priority Date: 10/31/2014
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Tae, Seunggyu
• Primary Examiner(s): Landau, Matthew
• Assistant Examiner(s): WITHERS, GRANT S
• Application Number:
  US14/788,408
• Publication Number:
  US 20160126262A1
• Time in Patent Office: 630 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods
• CPC Class Codes: H10K 59/1201 Manufacture or treatment
• CPC Class Codes: H10K 59/1216 the pixel elements being capacitors
• CPC Class Codes: H10K 59/124 Insulating layers formed between TFT elements and OLED elements

Abstract

A display device is disclosed. In one aspect, the device includes a plurality of pixels. Each of the pixels includes a first thin-film transistor (TFT) formed over a substrate and comprising gate electrode, a source electrode, and a drain electrode. Each pixel also includes a storage capacitor formed over the substrate, wherein the storage capacitor includes first and second electrodes, and a dielectric layer interposed between the first and second electrodes. The first electrode, the dielectric layer, and the second electrode have substantially the same pattern.

Claims

1. A display device comprising a plurality of pixels, each of the pixels comprising:

a first thin-film transistor (TFT) formed over a substrate and comprising a gate electrode, a source electrode, and a drain electrode, wherein the TFT further comprises an active layer including a source region, a drain region, and a channel region between the source region and the drain region; and

a storage capacitor formed over the substrate, wherein the storage capacitor includes a first electrode, a second electrode over the first electrode, and a dielectric layer interposed between the first and second electrodes, wherein the storage capacitor is formed over and overlaps the active layer of the first TFT in the depth dimension of the display device, wherein the gate electrode of the first TFT and the first electrode of the storage capacitor are formed of the same conductive layer,

wherein the first electrode, the dielectric layer, and the second electrode have sidewalls being vertically aligned to each other, and

wherein the second electrode entirely covers the channel region in a cross-sectional cutout view.

2. The display device of claim 1, wherein the first electrode of the storage capacitor and the gate electrode are formed on the same layer and formed of the same material.

3. The display device of claim 1, wherein each of the pixels further comprises a data line, and wherein the second electrode of the storage capacitor is formed above the gate electrode and below the data line.

4. The display device of claim 3, wherein each of the pixels further comprises an interlayer insulating layer formed between the second electrode of the storage capacitor and the data line.

5. The display device of claim 1, wherein each of the pixels further comprises a second TFT formed over the substrate.

6. The display device of claim 5, wherein each of the pixels further comprises an insulation pattern layer that is formed on the gate electrode of the second TFT.

7. The display device of claim 6, wherein the insulation pattern layer and the dielectric layer are formed of the same material.

8. The display device of claim 1, wherein the first and second electrodes of the storage capacitor comprise materials that have different etch selectivities.

9. The display device of claim 1, wherein the first electrode, the dielectric layer, and the second electrode have substantially the same width.

10. The display device of claim 1, wherein the first electrode of the storage capacitor has top and bottom surfaces opposing each other, wherein the bottom surface faces the substrate, wherein the gate electrode has top and bottom surfaces opposing each other, wherein the bottom surface of the gate electrode faces the substrate, and wherein the distance between the bottom surface of the first electrode of the storage capacitor and the substrate is the same as the distance between the bottom surface of the gate electrode and the substrate.