General input/output architecture, protocol and related methods to implement flow control

• US 9,602,408 B2
• Filed: 12/30/2013
• Issued: 03/21/2017
• Est. Priority Date: 08/24/2001
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Ajanovic, Jasmin, Harriman, David, Fanning, Blaise, Lee, David
• Primary Examiner(s): Baturay, Alicia
• Application Number:
  US14/144,320
• Publication Number:
  US 20140189174A1
• Time in Patent Office: 1,177 Days
• Field of Search: 709/234
• US Class Current: 1/1
• CPC Class Codes: G06F 13/124 where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices
• CPC Class Codes: G06F 13/4059 where the synchronisation uses buffers, e.g. for speed matching between buses
• CPC Class Codes: G06F 13/42 Bus transfer protocol, e.g. handshake; Synchronisation
• CPC Class Codes: G06F 13/4221 being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
• CPC Class Codes: G06F 13/4252 using a handshaking protocol
• CPC Class Codes: G06F 13/4265 on a point to point bus G06F13/4247, G06F13/4282 take precedence
• CPC Class Codes: G06F 13/4269 using a handshaking protocol, e.g. Centronics connection
• CPC Class Codes: G06F 13/4282 on a serial bus, e.g. I2C bus, SPI bus on daisy chain buses G06F13/4247
• CPC Class Codes: G06F 5/06 for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor G06F7/78 takes precedence
• CPC Class Codes: H04L 47/10 Flow control; Congestion control
• CPC Class Codes: H04L 47/30 in combination with information about buffer occupancy at either end or at transit nodes

Abstract

An enhanced general input/output communication architecture, protocol and related methods are presented.

Claims

1. An apparatus, comprising:

a protocol stack including layers to communicate data over an interconnect, wherein the protocol stack is implemented at least in part in hardware circuitry and the layers comprise a physical layer, a data link layer, and a transaction layer;

a transmitter to transmit data on a point to point interconnect; and

wherein the protocol stack is to assemble a plurality of messages, and at least one of the messages comprises a data link layer message to include a plurality of credits fields, each of the plurality of credits fields corresponds to a respective one of a plurality of credit counters and is to indicate a respective number of credits to be returned for the corresponding credit counter, and the data link layer message does not encapsulate a transaction layer packet.

2. The apparatus of claim 1, wherein the data link layer message comprises a message frame.

3. The apparatus of claim 1, wherein the interconnect includes a communication link.

4. The apparatus of claim 1 further comprising a transmitter which includes a particular counter to track a number of credits consumed.

5. The apparatus of claim 4 wherein the particular counter may track up to at least sixty-three credits.

6. The apparatus of claim 4 wherein the particular counter is set to zero upon initialization.

7. A method, comprising:

utilizing a protocol stack including layers to communicate data over an interconnect, wherein the layers comprise a physical layer, a data link layer, and a transaction layer;

utilizing a transmitter to transmit data on a point to point interconnect; and

utilizing the protocol stack to assemble a plurality of messages, wherein at least one of the messages comprises a data link layer message including a plurality of credits fields, each of the plurality of credits fields corresponds to a respective one of a plurality of credit counters and is to indicate a respective number of credits to be returned for the corresponding credit counter, and the data link layer message does not encapsulate a transaction layer packet.

8. The method of claim 7 further comprising utilizing a receiver to transmit information about a current memory space available to store data.

9. The method of claim 7 further comprising utilizing a transmitter which includes a particular counter to track a number of credits consumed.

10. The method of claim 9 further comprising resetting the particular counter to zero upon system reset.

11. The method of claim 7 further comprising refraining from sending packets from a transmitter to a receiver when a corresponding one of the credits fields has a value of zero therein.

12. The method of claim 7 wherein the messages are to achieve flow control of data between devices.

13. The method of claim 12, wherein flow control is performed by the transaction layer in cooperation with the data link.

14. A non-transitory computer readable medium storing computer readable instructions for machine execution of a method for:

utilizing a protocol stack including layers to communicate data over an interconnect, wherein the layers comprise a physical layer, a data link layer, and a transaction layer;

utilizing a transmitter to transmit data on a point to point interconnect;

wherein the protocol stack including layers comprises a physical layer, a data link layer, and a transaction layer; and

utilizing the protocol stack to assemble a plurality of messages, wherein at least one of the messages comprises a data link layer message including a plurality of credits fields, each of the plurality of credits fields corresponds to a respective one of a plurality of credit counters and is to indicate a respective number of credits to be returned for the corresponding credit counter, and the data link layer message does not encapsulate a transaction layer packet.

15. The non-transitory computer readable medium of claim 14, wherein the messages are communicated from a first device to a second device over the interconnect.

16. A system-on-a-chip (SoC) embedded within a mobile device, comprising:

a protocol stack including layers to communicate data over an interconnect, wherein the layers comprise a physical layer, a data link layer, and a transaction layer; and

a transmitter to transmit data on a point to point interconnect;

wherein the protocol stack is to assemble a plurality of messages, and at least one of the messages comprises a data link layer message to include a plurality of credits fields, each of the plurality of credits fields corresponds to a respective one of a plurality of credit counters and is to indicate a respective number of credits to be returned for the corresponding credit counter, and the data link layer message does not encapsulate a transaction layer packet.

17. The SoC of claim 16 further comprises a transmitter which includes a particular counter to track a number of credits consumed and a receiver to transmit information about a current memory space available to store data.