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System and method for accelerating network applications using an enhanced network interface and massively parallel distributed processing

  • US 9,602,437 B1
  • Filed: 10/03/2013
  • Issued: 03/21/2017
  • Est. Priority Date: 10/03/2012
  • Status: Active Grant
First Claim
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1. A system, comprising:

  • at least one network interface comprising at least one first processor to;

    receive a plurality of packets from a network;

    for each packet in the plurality of packets, analyze packet contents to determine a specific data type to which the respective packet corresponds;

    filter the plurality of packets into a plurality of groups, each group based on the specific data type;

    insert the plurality of packets of a first group into a corresponding first buffer in memory of at least one graphics processing unit using direct memory access;

    assign each of the packets of the first group an index representing an offset indicating a location in the memory of the at least one graphics processing unit;

    determine that a pre-configured buffer flow capacity has been reached regarding the first buffer in the at least one graphics processing unit; and

    transmit an interrupt to the at least one graphics processing unit corresponding to the pre-configured buffer flow capacity regarding the first buffer in the least one graphics processing unit; and

    the at least one graphics processing unit connected to the at least one network interface over a bus and comprising at least one second processor to;

    start a first kernel preconfigured with packet handling code adapted to process packets of the specific data type in response to the interrupt to process the packets in the first buffer;

    wherein a substantially identical set of computer-readable instructions associated with the first kernel is executed on each of the packets in the first buffer;

    wherein a plurality of threads are executed on the at least one graphics processing units to process the packets in the first buffer at the index location assigned to each corresponding packet;

    wherein upon a failure of one or more graphics processing units, send packets to backup GPU buffers and transmit an interrupt to one or more backup graphics processing units.

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