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System for driving an array of MEMS structures and corresponding driving method

  • US 9,604,842 B2
  • Filed: 03/31/2015
  • Issued: 03/28/2017
  • Est. Priority Date: 05/27/2014
  • Status: Active Grant
First Claim
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1. A system to drive a MEMS array, the system comprising:

  • a plurality of row driving stages coupled to the MEMS array, the MEMS array having a plurality of MEMS structures that each have a row terminal and a column terminal, each of the plurality of row driving stages being configured to supply row-biasing signals to the row terminal of each MEMS structure associated with a respective row;

    a plurality of column driving stages coupled to the MEMS array, each of the plurality of column driving stages being configured to supply column-biasing signals to the column terminal of each MEMS structure associated with a respective column;

    a plurality of failure-detection stages coupled to the MEMS array and configured to detect at least one failure associated with one or more of said MEMS structures; and

    a control unit configured to supply row-address signals to said row driving stages to generate the row-biasing signals and to supply column-address signals to said column driving stages to generate the column-biasing signals,the control unit being configured to further supply row-deactivation and column-deactivation signals to one or more of said row and column driving stages to cause deactivation of one or more rows and columns of said MEMS array, the control unit being coupled to said failure-detection stages and configured to identify a position of the failure at the one or more of said MEMS structures and to cause deactivation of the one or more rows and columns of said MEMS array that correspond to said position, the control unit being configured to enable the respective row-deactivation and column-deactivation signals associated with the position of the failure,wherein each of said row driving stages includes;

    a respective row driving stage high-side transistor coupled between the associated row terminal and a respective high-voltage supply terminal configured to receive a high supply voltage;

    a respective row driving stage low-side transistor coupled between the associated row terminal and a respective low-voltage supply terminal configured to receive a first intermediate supply voltage; and

    a respective row driving stage control block configured to receive the respective row-deactivation signal and to supply control signals to the respective row driving stage high-side and low-side transistors to switch off both said respective row driving stage high-side and low-side transistorswherein each of said column driving stages includes;

    a respective column driving stage high-side transistor coupled between the associated column terminal and a respective high-voltage supply terminal configured to receive a second intermediate supply voltage;

    a respective column driving stage low-side transistor coupled between the associated column terminal and a respective low-voltage supply terminal configured to receive a low supply voltage; and

    a respective column driving stage control block configured to receive the respective column-deactivation signal and to supply control signals to the respective column driving stage high-side and low-side transistors to switch off both said respective column driving stage high-side and low-side transistors.

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