Bus microcontroller, bus node circuit and electronic control unit for a vehicle
First Claim
1. A bus microcontroller, comprising:
- a processor circuit having at least one unit to perform one or more functions directed by a bus command received via a communication bus;
a power control circuit coupleable to a transmitter-receiver circuit, the transmitter-receiver circuit configured to receive bus messages via the communication bus;
means for placing at least part of the processor circuit into a reduced-power operating mode without placing the entire processor circuit into the reduced-power operating mode, said power control circuit configured to evaluate incoming bus messages, said power control circuit configured to determine if an activation bus message contains information to activate the at least part of the processor circuit, and said power control circuit configured to output an activation control signal corresponding to the information to activate the at least part of the processor circuit; and
means for activating the at least part of the processor circuit from the reduced-power operating mode in response to output of the activation control signal of the power control circuit, wherein the bus microcontroller is configured, when the at least part of the processor circuit is in the reduced-power operating mode, to identify itself as an inactive bus participant towards a bus control module from which the transmitter-receiver circuit receives bus messages.
2 Assignments
0 Petitions
Accused Products
Abstract
A bus microcontroller includes a processor circuit having at least one unit designed for performing one or more functions due to a bus command via a communication bus, a power control circuit adapted to be coupled to a transmitter-receiver circuit for receiving bus messages via the communication bus, and a means for placing at least part of the processor circuit into a reduced-power operating mode without placing the entire processor circuit into the reduced-power operating mode. The power control circuit is designed to evaluate incoming bus messages with respect to an activation bus message containing information on activating at least part of the processor circuit, and to output a corresponding activation control signal. The bus microcontroller also includes means for activating at least a part of the processor circuit that is placed in a reduced-power operating mode, in response to output of an activation control signal of the power control circuit.
7 Citations
21 Claims
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1. A bus microcontroller, comprising:
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a processor circuit having at least one unit to perform one or more functions directed by a bus command received via a communication bus; a power control circuit coupleable to a transmitter-receiver circuit, the transmitter-receiver circuit configured to receive bus messages via the communication bus; means for placing at least part of the processor circuit into a reduced-power operating mode without placing the entire processor circuit into the reduced-power operating mode, said power control circuit configured to evaluate incoming bus messages, said power control circuit configured to determine if an activation bus message contains information to activate the at least part of the processor circuit, and said power control circuit configured to output an activation control signal corresponding to the information to activate the at least part of the processor circuit; and means for activating the at least part of the processor circuit from the reduced-power operating mode in response to output of the activation control signal of the power control circuit, wherein the bus microcontroller is configured, when the at least part of the processor circuit is in the reduced-power operating mode, to identify itself as an inactive bus participant towards a bus control module from which the transmitter-receiver circuit receives bus messages. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A bus node circuit for a communication bus, comprising:
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a bus microcontroller having a processor circuit, the processor circuit having at least one unit adapted to perform one or more functions directed by a bus command passed over a communication bus; a transmitter-receiver circuit to receive bus messages, the transmitter-receiver circuit coupleable to the communication bus; a power control circuit coupled to the transmitter-receiver circuit; means for placing at least part of the processor circuit into a reduced-power operating mode without placing the entire processor circuit into the reduced-power operating mode, the power control circuit configured to evaluate incoming bus messages, the power control circuit configured to determine if an activation bus message contains information to activate the at least part of the processor circuit, and the power control circuit configured to output an activation control signal corresponding to the information to activate the at least part of the processor circuit; and means for activating the at least a part of the processor circuit from the reduced-power operating mode in response to output of the activation control signal of the power control circuit, wherein the bus microcontroller is configured, when the at least part of the processor circuit is in the reduced-power operating mode, to identify itself as an inactive bus participant towards a bus control module from which the transmitter-receiver circuit receives bus messages. - View Dependent Claims (14, 15, 16)
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17. A method, comprising:
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receiving a plurality of bus messages via a communication bus; evaluating bus messages; performing at least one function with a processor circuit, the performance of the at least one function directed by a bus command included in a first bus message of the plurality of bus messages; placing at least part of the processor circuit into a reduced-power operating mode without placing the entire processor circuit into the reduced-power operating mode; communicating an inactive-status bus message on the communication bus concurrent with the at least part of the processor circuit being in the reduced-power operating mode; determining if an activation bus message contains information to activate the at least part of the processor circuit; outputting an activation control signal corresponding to the information to activate the at least part of the processor circuit; and activating the at least part of the processor circuit from the reduced-power operating mode in response to the activation control signal. - View Dependent Claims (18, 19, 20, 21)
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Specification