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Non-volatile dynamic random access memory (NVDRAM) with programming line

  • US 9,607,663 B2
  • Filed: 08/11/2015
  • Issued: 03/28/2017
  • Est. Priority Date: 08/11/2015
  • Status: Active Grant
First Claim
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1. A memory circuit, comprising:

  • a first bit line;

    a first program line;

    a first memory cell, coupled to the first bit line and the first program line, comprising;

    a first capacitor having a first terminal coupled to a first storage node and a second terminal coupled to a reference;

    a first pass gate transistor coupled between the first bit line and the first storage node; and

    a first non-volatile (NV) element and a second pass gate transistor coupled in series, wherein the first NV element and the second pass gate transistor are coupled between the first storage node and the first program line; and

    a programming transistor having a first current electrode coupled to a second program line, a control electrode coupled to a word line, and a second current electrode coupled to a programming node between the second pass gate transistor and the NV element.

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