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Method and apparatus for MOS device with doped region

  • US 9,608,107 B2
  • Filed: 02/27/2014
  • Issued: 03/28/2017
  • Est. Priority Date: 02/27/2014
  • Status: Active Grant
First Claim
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1. A semiconductor device comprising:

  • a semiconductor layer;

    a doped well disposed in the semiconductor layer and having a first conductivity type;

    a drain region disposed in the doped well;

    a source region and a body region disposed in the semiconductor layer;

    a first doped region having a second conductivity type, the first doped region being disposed between the source region and the doped well, and a lower portion of the first doped region being in contact with the semiconductor layer;

    a second doped region having the first conductivity type, the second doped region being disposed under the source region and between the source region and the first doped region, and a lower portion of the second doped region being in contact with the semiconductor layer;

    a third doped region having the second conductivity type and disposed in the doped well; and

    a fourth doped region disposed in the doped well and above the third doped region, the fourth doped region having the first conductivity type.

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