Method and apparatus for adapting a variable impedance network
First Claim
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1. A device, comprising:
- first and second variable capacitors on a single die, wherein the first and second variable capacitors are not in parallel, wherein each end of the first and second variable capacitors has an accessible external port,wherein the first and second variable capacitors are adapted to be configured as a Pi or L circuit topology.
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Abstract
The present disclosure may include, for example, a tunable capacitor having a decoder for generating a plurality of control signals, and an array of tunable switched capacitors comprising a plurality of fixed capacitors coupled to a plurality of switches. The plurality of switches can be controlled by the plurality of control signals to manage a tunable range of reactance of the array of tunable switched capacitors. Additionally, the array of tunable switched capacitors is adapted to have non-uniform quality (Q) factors. Additional embodiments are disclosed.
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20 Claims
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1. A device, comprising:
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first and second variable capacitors on a single die, wherein the first and second variable capacitors are not in parallel, wherein each end of the first and second variable capacitors has an accessible external port, wherein the first and second variable capacitors are adapted to be configured as a Pi or L circuit topology. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A device, comprising:
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first and second variable capacitors on a single die, wherein the first and second variable capacitors are not in parallel, wherein each end of the first and second variable capacitors has an accessible external port, wherein the first and second variable capacitors are adapted to be configured as a Pi circuit topology. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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17. A device, comprising:
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first and second variable capacitors on a single die, wherein the first and second variable capacitors are not in parallel, wherein each end of the first and second variable capacitors has an accessible external port, wherein the first and second variable capacitors are adapted to be configured as an L circuit topology. - View Dependent Claims (18, 19, 20)
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Specification