Method and apparatus improving gate oxide reliability by controlling accumulated charge
First Claim
1. An accumulated charge control (ACC) NMOSFET (ACC NMOSFET), comprising:
- a) an NMOSFET having a floating body, a gate, a source, a drain and a gate oxide layer between the gate and the body, wherein the NMOSFET is selectively biased to operate in an accumulated charge regime, and wherein, but for an accumulated charge control structure, accumulated charge accumulates within the body in a region proximate to the gate oxide when the NMOSFET is biased to operate in the accumulated charge regime; and
b) an accumulated charge control structure comprising an accumulated charge sink (ACS) coupled to the body of the NMOSFET, wherein when the NMOSFET is operated in the accumulated charge regime, an ACS bias voltage (VACS) is applied to the ACS to remove or otherwise control the accumulated charge;
wherein the VACS is sufficiently negative with respect to ground, the source, and the drain to cause removal or control of the accumulated charge.
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Accused Products
Abstract
A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.
364 Citations
43 Claims
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1. An accumulated charge control (ACC) NMOSFET (ACC NMOSFET), comprising:
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a) an NMOSFET having a floating body, a gate, a source, a drain and a gate oxide layer between the gate and the body, wherein the NMOSFET is selectively biased to operate in an accumulated charge regime, and wherein, but for an accumulated charge control structure, accumulated charge accumulates within the body in a region proximate to the gate oxide when the NMOSFET is biased to operate in the accumulated charge regime; and b) an accumulated charge control structure comprising an accumulated charge sink (ACS) coupled to the body of the NMOSFET, wherein when the NMOSFET is operated in the accumulated charge regime, an ACS bias voltage (VACS) is applied to the ACS to remove or otherwise control the accumulated charge; wherein the VACS is sufficiently negative with respect to ground, the source, and the drain to cause removal or control of the accumulated charge. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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20. An accumulated charge control NMOSFET (ACC NMOSFET), comprising:
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a) an NMOSFET including a floating body, a gate, a drain, a source, and a gate oxide layer between the gate and the body, wherein the NMOSFET has a threshold voltage (Vth); and b) an accumulated charge sink (ACS) electrically coupled to the body of the NMOSFET, wherein the NMOSFET operates in an accumulated charge regime when the NMOSFET is biased by means of a gate control voltage (Vg) to operate in an OFF-state (non-conducting state), and wherein, but for the ACS, charge accumulates within the body in a region proximate the gate oxide, and wherein the NMOSFET has no source-to-drain DC voltage applied thereto; and
wherein an ACS bias voltage (VACS) is applied to the ACS and thereby substantially prevents accumulated charge from accumulating in the body, and wherein VACS is sufficiently negative with respect to ground, the source, the drain, and Vth to substantially prevent accumulated charge from accumulating in the body; andc) a silicon-on-insulator substrate having at least a silicon layer and an insulating layer, wherein the NMOSFET and ACS are fabricated in the silicon layer to form the ACC NMOSFET and wherein the NMOSFET body is situated between the source, the drain, the gate oxide, and the insulating layer. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42)
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43. An accumulated charge control (ACC) NMOSFET (ACC NMOSFET), comprising:
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a. an NMOSFET having a floating body, a gate, a source, a drain and a gate oxide layer between the gate and the body, and b. an accumulated charge sink (ACS) coupled to the body of the NMOSFET; wherein the NMOSFET is selectively biased to operate in an accumulated charge regime, and for at least part of a time when so biased; (1) but for the ACS, accumulated charge accumulates within the body in a region proximate to the gate oxide; and (2) an ACS bias voltage (VACS) is applied to the ACS to remove or otherwise control the accumulated charge, wherein the VACS is sufficiently negative with respect to ground, the source, and the drain and Vth to cause removal of or otherwise control the accumulated charge.
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Specification