Turbo decoding techniques

• US 9,608,851 B2
• Filed: 04/18/2016
• Issued: 03/28/2017
• Est. Priority Date: 03/15/2013
• Status: Expired due to Fees

• Current Assignee: Jonathan Kanter
• Original Assignee: Jonathan Kanter
• Inventors: Kanter, Jonathan
• Primary Examiner(s): Bocure, Tesfaldet
• Application Number:
  US15/132,077
• Publication Number:
  US 20160234054A1
• Time in Patent Office: 344 Days
• Field of Search: 375/261, 375/262, 375/265, 375/316, 375/340, 375/341, 370/203, 370/208, 370/210, 714/746
• US Class Current: 1/1
• CPC Class Codes: H03M 13/11 using multiple parity bits
• CPC Class Codes: H03M 13/1515 Reed-Solomon codes
• CPC Class Codes: H03M 13/23 using convolutional codes, e.g. unit memory codes
• CPC Class Codes: H03M 13/258 with turbo codes, e.g. Turbo Trellis Coded Modulation [TTCM]
• CPC Class Codes: H03M 13/2732 Convolutional interleaver; Interleavers using shift-registers or delay lines like, e.g. Ramsey type interleaver
• CPC Class Codes: H03M 13/2927 Decoding strategies
• CPC Class Codes: H03M 13/2948 Iterative decoding H03M13/2957 takes precedence
• CPC Class Codes: H03M 13/2966 Turbo codes concatenated with another code, e.g. an outer block code
• CPC Class Codes: H03M 13/6325 Error control coding in combination with demodulation
• CPC Class Codes: H04B 1/12 Neutralising, balancing, or compensation arrangements
• CPC Class Codes: H04L 1/00 Arrangements for detecting or preventing errors in the information received correcting synchronisation H04L7/00
• CPC Class Codes: H04L 25/03159 operating in the frequency domain H04L25/03165, H04L25/03178 take precedence
• CPC Class Codes: H04L 27/2647 Arrangements specific to the receiver only equalisation H04L27/01
• CPC Class Codes: H04L 5/0007 the frequencies being orthogonal, e.g. OFDM(A), DMT
• CPC Class Codes: H04L 5/0046 Determination of how many bits are transmitted on different sub-channels
• CPC Class Codes: H04L 5/0048 Allocation of pilot signals, i.e. of signals known to the receiver

Abstract

Techniques are disclosed for turbo decoding orthogonal frequency division multiplexing (OFDM) symbols. Techniques for combined turbo decoding and equalization are disclosed. The disclosed techniques can be implemented in receivers that receive wired or wireless OFDM signals and produce data and control bits by decoding the received signals. The techniques may be incorporated within an ADSL or a VDSL receiver.

Claims

1. A turbo decoding method for decoding a stream of a plurality orthogonal frequency division multiplexing (OFDM) symbols in which a plurality of constellations are generated by block coding and trellis coding a first number of least significant bits and only block coding a second number of most significant bits, comprising:

receiving the plurality of orthogonal frequency division multiplexing (OFDM) symbols;

demodulating the plurality of OFDM symbols to obtain a plurality of signal constellations having variable sizes inputting, to a soft input soft output (SISO) constellation demapper, the plurality of signal constellations, along with information about a number of bits represented by each constellation from the plurality of signal constellations;

operating a soft input soft output (SISO) constellation demapper on constellations of variable sizes to generate an output for subsequent soft decoding, and

performing convolutional interleaving of a decoded output of the convolutional deinterleaving.

2. The method of claim 1, further comprising:

synchronizing soft inputs from a SISO trellis decoder and soft inputs from the SISO constellation demapper to produce a plurality of bits and assembling the plurality of bits into bytes.

3. The method of claim 1, further including:

buffering, in a constellation buffer, constellations from the plurality of signal constellations for at least two of the plurality of OFDM symbols.

4. The method of claim 1, further including:

buffering a number of demapped constellations output from the SISO constellation demapper, for at least two of the plurality of OFDM symbols.

5. The method of claim 1, further comprising:

generating hard coded bits, wherein the generating hard coded bits is an iterative process in which a buffer is used to extract a number of bits from an incoming frame.

6. A turbo decoding apparatus, at least partially implemented in hardware, with a feedback or pipelined architecture, and one or more high level modules, for decoding a stream of a plurality orthogonal frequency division multiplexing (OFDM) symbols in which a plurality of constellations are generated by block coding and trellis coding a first number of least significant bits and only block coding a second number of most significant bits, comprising:

a module that demodulates a plurality of OFDM symbols to obtain a plurality of signal constellations having variable sizes;

a module that provides, to a soft input soft output (SISO) constellation demapper, the plurality of signal constellations, along with information about a number of bits represented by each constellation from the plurality of signal constellations; and

a module with either soft inputs soft outputs (SISO) or soft inputs and hard outputs (SIHO) that demaps the constellations of variable sizes to encoded bits;

a module with SISO or SIHO that decodes a trellis code;

a module with SISO, or hard inputs hard outputs (HIHO), that synchronizes inputs from the module that decodes the trellis code and inputs from the module that demaps the constellations, assembles the bits into a plurality of bytes, and outputs the plurality of bytes;

a module with SISO or HIHO that convolutionally deinterleaves the plurality of bytes;

a module with SISO or hard inputs soft outputs (HISO) that decodes the deinterleaved plurality of bytes and generates soft or hard decoded bytes; and

a module with SISO that convolutionally interleaves the decoded bytes and provides a priori information to the module that decodes the trellis code.

7. The apparatus of claim 6, further comprising:

a module with soft inputs and soft outputs that buffers a number of constellations from the plurality of signal constellations, wherein the number is greater than or equal to a depth of interleaving used for encoding the plurality of OFDM symbols.

8. The apparatus of claim 6, further comprising:

a module with soft inputs and soft outputs that buffers a number of demapped constellations output from the SISO constellation demapper, wherein the number is greater than or equal to a depth of interleaving used for encoding the plurality of OFDM symbols.

9. The apparatus of claim 6, further comprising:

a module with soft inputs and soft outputs that buffers on or more data frames corresponding to the bits in an OFDM symbol.

10. The apparatus of claim 6, further comprise a module that generates hard coded bits, wherein the module that generates the hard coded bits using an iterative process such that for all iterations except a last iteration, a buffer is used to extract a number of bits from an incoming frame.

11. The apparatus of claim 6, wherein the two different classes of data comprise a first class of data comprising a synchronization symbol and a second class of data comprising output of an outer decoder of turbo decoding.

12. The apparatus of claim 6, further comprise a plurality of modules connected in a pipelined architecture, wherein, for a first module in the pipelined architecture, the a priori information is equal to zero, for other modules, their a priori information is generated by a preceding module, and a last active module generates the hard decoded bits.

13. A turbo decoding method, at least partially implemented in hardware, with a feedback or pipelined architecture, for decoding a stream of a plurality orthogonal frequency division multiplexing (OFDM) symbols in which a plurality of constellations are generated by block coding and trellis coding a first number of least significant bits and only block coding a second number of most significant bits, comprising:

an operation that demodulates a plurality of OFDM symbols to obtain a plurality of signal constellations having variable sizes;

an operation that provides, to a soft input soft output (SISO) constellation demapper, the plurality of signal constellations, along with information about a number of bits represented by each constellation from the plurality of signal constellations; and

an operation that, with either soft inputs soft outputs (SISO) or soft inputs and hard outputs (SIHO), demaps the constellations of variable sizes to encoded bits;

an operation that, with SISO or SIHO, decodes a trellis code;

an operation that, with SISO, or hard inputs hard outputs (HIHO), synchronizes inputs from the module that decodes the trellis code and inputs from the module that demaps the constellations, assembles the bits into a plurality of bytes, and outputs the plurality of bytes;

an operation that, with SISO or HIHO, convolutionally deinterleaves the plurality of bytes;

an operation that, with SISO or hard inputs soft outputs (HISO), decodes the deinterleaved plurality of bytes and generates soft or hard decoded bytes; and

an operation that, with SISO, convolutionally interleaves the decoded bytes and provides a priori information to the module that decodes the trellis code.

14. The method of claim 13, further comprising:

an operation that, with soft inputs and soft outputs, buffers a number of constellations from the plurality of signal constellations, wherein the number is greater than or equal to a depth of interleaving used for encoding the plurality of OFDM symbols.

15. The method of claim 13, further comprising:

an operation that, with soft inputs and soft outputs, buffers a number of demapped constellations output from the SISO constellation demapper, wherein the number is greater than or equal to a depth of interleaving used for encoding the plurality of OFDM symbols.

16. The method of claim 13, further comprising:

an operation that, with soft inputs and soft outputs, buffers on or more data frames corresponding to the bits in an OFDM symbol.

17. The method of claim 13, further comprise an operation that generates hard coded bits, wherein the operation that generates the hard coded bits using an iterative process such that for all iterations except a last iteration, a buffer is used to extract a number of bits from an incoming frame.

18. The method of claim 13, wherein the two different classes of data comprise a first class of data comprising a synchronization symbol and a second class of data comprising output of an outer decoder of turbo decoding.

19. The method of claim 13, further comprise a plurality of operations implemented in a pipelined architecture, wherein for first operation, the a priori information is equal to zero, for other operations, their a priori information is generated by a preceding operation, and a last operation generates the hard decoded bits.