Pixel structure and array substrate

• US 9,612,479 B2
• Filed: 12/02/2015
• Issued: 04/04/2017
• Est. Priority Date: 05/09/2012
• Status: Expired due to Fees

• Current Assignee: Chunghwa Picture Tubes Limited
• Original Assignee: Chunghwa Picture Tubes Limited
• Inventors: Fu, Hsin-Min, Wu, Hung-Yu, Lian, Jan-Tian
• Primary Examiner(s): Glick, Edward
• Assistant Examiner(s): Quash, Anthony G
• Application Number:
  US14/956,396
• Publication Number:
  US 20160091761A1
• Time in Patent Office: 489 Days
• CPC Class Codes: G02F 1/133707 Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes
• CPC Class Codes: G02F 1/133753 with different alignment orientations or pretilt angles on a same surface, e.g. for grey scale or improved viewing angle
• CPC Class Codes: G02F 1/133757 with different alignment orientations
• CPC Class Codes: G02F 1/134309 characterised by their geometrical arrangement
• CPC Class Codes: G02F 1/134363 for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]

Abstract

The present invention provides a pixel structure disposed on a substrate, and the pixel structure includes an alignment layer, a common electrode, and a pixel electrode. The alignment layer is disposed on the substrate, and the alignment layer has a first section and a second section. The first section has a first alignment direction, and the second section has a second alignment direction perpendicular to the first alignment direction. The common electrode is disposed between the substrate and the alignment layer, and the pixel electrode is disposed between the substrate and the alignment layer.

Claims

1. A pixel structure, disposed on a substrate, and the pixel structure comprising:

an alignment layer, disposed on the substrate, and the alignment layer comprising a first section and a second section, wherein the first section has a first alignment direction, and the second section has a second alignment direction perpendicular to the first alignment direction;

a common electrode, disposed between the substrate and the alignment layer; and

a pixel electrode, disposed between the substrate and the alignment layer, wherein the pixel electrode comprises a plurality of first stripe slits parallel to each other, a plurality of second stripe slits parallel to each other, a plurality of third stripe slits parallel to each other, and a plurality of fourth stripe slits parallel to each other, the first stripe slits and the third stripe slits overlap the first section, the second stripe slits and the fourth stripe slits overlap the second section, the first stripe slits are perpendicular to the second stripe slits, and the third stripe slits are perpendicular to the fourth stripe slits, and wherein each of the first stripe slits connects each of the third stripe slits, each of the first stripe slits and each of the third stripe slits are symmetric with respect to the first alignment direction to form a first V-shaped slit, the first V-shaped slits are divided into a plurality of first V-shaped sub-slits and a plurality of second V-shaped sub-slits, each of the first V-shaped sub-slits has a first opening, each of the second V-shaped sub-slits has a second opening, each of the first openings and each of the second openings face two opposite directions respectively, each of the first V-shaped sub-slits and each of the second V-shaped sub-slits are alternately arranged along the second alignment direction, each of the second stripe slits connects each of the fourth stripe slits, and each of the second stripe slits and each of the fourth stripe slits are symmetric with respect to the second alignment direction to form a second V-shaped slit.

2. The pixel structure according to claim 1, wherein an included angle between each of the first stripe slits and the first alignment direction is greater than zero degrees, and less than or equal to 20 degrees.

3. The pixel structure according to claim 1, further comprising an isolating layer, disposed between the common electrode and the pixel electrode.

4. The pixel structure according to claim 3, wherein the pixel electrode is disposed between the isolating layer and the alignment layer, and the common electrode is disposed between the isolating layer and the substrate.

5. The pixel structure according to claim 3, wherein the common electrode is disposed between the isolating layer and the alignment layer, and the pixel electrode is disposed between the isolating layer and the substrate.

6. The pixel structure according to claim 1, wherein the second V-shaped slits are divided into a plurality of third V-shaped sub-slits and a plurality of fourth V-shaped sub-slits, each of the third V-shaped sub-slits has a third opening, each of the fourth V-shaped sub-slits has a fourth opening, each of the third openings and each of the fourth openings respectively face another two opposite directions different from the two opposite directions, each of the third V-shaped sub-slits and each of the fourth V-shaped sub-slits are alternately arranged along the first alignment direction.

7. An array substrate, comprising:

a substrate, having a plurality of pixel regions; and

a plurality of pixel structures, disposed on the substrate in the pixel regions respectively, and each of the pixel structure comprising;

an alignment layer, disposed on the substrate, and the alignment layer comprising a first section and a second section, wherein the first section has a first alignment direction, and the second section has a second alignment direction perpendicular to the first alignment direction;

a common electrode, disposed between the substrate and the alignment layer; and

a pixel electrode, disposed between the substrate and the alignment layer, wherein the pixel electrode comprises a plurality of first stripe slits parallel to each other, a plurality of second stripe slits parallel to each other, a plurality of third stripe slits parallel to each other, and a plurality of fourth stripe slits parallel to each other, the first stripe slits and the third stripe slits overlap the first section, the second stripe slits and the fourth stripe slits overlap the second section, the first stripe slits are perpendicular to the second stripe slits, and the third stripe slits are perpendicular to the fourth stripe slits, and wherein each of the first stripe slits connects each of the third stripe slits, each of the first stripe slits and each of the third stripe slits are symmetric with respect to the first alignment direction to form a first V-shaped slit, the first V-shaped slits are divided into a plurality of first V-shaped sub-slits and a plurality of second V-shaped sub-slits, each of the first V-shaped sub-slits has a first opening, each of the second V-shaped sub-slits has a second opening, each of the first openings and each of the second openings face two opposite directions respectively, each of the first V-shaped sub-slits and each of the second V-shaped sub-slits are alternately arranged along the second alignment direction, each of the second stripe slits connects each of the fourth stripe slits, and each of the second stripe slits and each of the fourth stripe slits are symmetric with respect to the second alignment direction to form a second V-shaped slit.

8. The array substrate according to claim 7, wherein the second V-shaped slits are divided into a plurality of third V-shaped sub-slits and a plurality of fourth V-shaped sub-slits, each of the third V-shaped sub-slits has a third opening, each of the fourth V-shaped sub-slits has a fourth opening, each of the third openings and each of the fourth openings respectively face another two opposite directions different from the two opposite directions, each of the third V-shaped sub-slits and each of the fourth V-shaped sub-slits are alternately arranged along the first alignment direction.