Data placement based on data properties in a tiered storage device system

• US 9,612,953 B1
• Filed: 10/24/2014
• Issued: 04/04/2017
• Est. Priority Date: 01/16/2014
• Status: Active Grant

• Current Assignee: Pure Storage, Inc.
• Original Assignee: Pure Storage, Inc.
• Inventors: Gold, Brian, Davis, John, Miller, Ethan, Colgrove, John, Vajgel, Peter, Hayes, John, Ho, Alex
• Primary Examiner(s): ELMORE, STEPHEN C
• Application Number:
  US14/523,722
• Time in Patent Office: 893 Days
• Field of Search: 711103, 711154, 711156, 711202, 36518533
• CPC Class Codes: G06F 12/0238 Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/12 Replacement control
• CPC Class Codes: G06F 2212/202 Non-volatile memory
• CPC Class Codes: G06F 2212/7202 Allocation control and policies
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0647 Migration mechanisms
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 3/0685 Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays

Abstract

A method for managing non-volatile memory is provided. The method includes determining at least one property of a data and determining to which type of a plurality of types of flash memory to write the data, based on the at least one property of the data. The plurality of types of flash memory includes at least two types having differing numbers of bits per cell. The method includes writing the data to a flash memory of the determined type. A flash manager and a flash storage device are provided.

Claims

1. A nonvolatile memory manager, comprising:

a mapping unit configured to place a first data into a first type of nonvolatile memory, responsive to the first data having a single instance during deduplication, the mapping unit further configured to place a second data into a second type of nonvolatile memory having a lower read error rate than the first type of nonvolatile memory, responsive to the second data having multiple discards during deduplication; and

the mapping unit further configured to relocate the first data or the second data to another location in the nonvolatile memory or to another type of nonvolatile memory, responsive to a dynamic property associated with the first data or the second data.

2. The nonvolatile memory manager of claim 1, wherein the dynamic property includes that the first data or the second data has resided in a same location in the first or second type of nonvolatile memory longer than a threshold of data retention time.

3. The nonvolatile memory manager of claim 1, wherein the mapping unit is further configured to determine into which of a plurality of types of nonvolatile memory to place or relocate the first data or the second data based upon a static property of the first data or the second data.

4. The nonvolatile memory manager of claim 1, wherein the second type of nonvolatile memory has a longer specified data retention time than the first type of nonvolatile memory.

5. The nonvolatile memory manager of claim 1, wherein the another location in or type of nonvolatile memory has a lower read error rate than the type of nonvolatile memory or location in non-volatile memory occupied by the first or second data prior to relocation.

6. The nonvolatile memory manager of claim 1, wherein the another location in or type of nonvolatile memory has a higher read cycle endurance and a lower write cycle endurance than the type of nonvolatile memory or location in non-volatile memory occupied by the first or second data prior to relocation.

7. The nonvolatile memory manager of claim 1, further comprising:

a memory mapper, configured to cooperate with the mapping unit to map logical addresses and physical addresses in a plurality of types of nonvolatile memory according to placements and relocations of data.

8. The nonvolatile memory manager of claim 1, wherein the nonvolatile memory includes at least two from a group consisting of:

one bit per cell flash memory, two bits per cell flash memory, three bits per cell flash memory, and four bits per cell flash memory.

9. The nonvolatile memory manager of claim 1, wherein the memory manager is configured to determine properties of the first and second data related to deduplication, from metadata associated with the first and second data.

10. A memory, comprising:

a nonvolatile memory having at least a nonvolatile memory of a first type and a nonvolatile memory of a second type having a lower read error rate than the first type; and

a memory manager, having at least one processor configured to perform actions including;

writing a first data to the nonvolatile memory of the first type responsive to a determination that the first data has a single instance during deduplication;

writing a second data to the nonvolatile memory of the second type responsive to a determination that the second data has multiple discards during deduplication; and

relocating the first data or the second data to another location in the nonvolatile memory or to another type of nonvolatile memory responsive to a dynamic property associated with the first data or the second data.

11. The memory of claim 10, wherein the nonvolatile memory includes at least two from a group consisting of:

one bit per cell flash memory, two bits per cell flash memory, three bits per cell flash memory, and four bits per cell flash memory.

12. The memory of claim 10, wherein the dynamic property includes that the first data or the second data has resided in a same location in the first or second type of nonvolatile memory longer than a threshold of data retention time.

13. The memory of claim 10, wherein the nonvolatile memory of the second type has a longer specified data retention time than the nonvolatile memory of the first type.

14. The memory of claim 10, wherein the memory manager is configured to determine properties of the first and second data related to deduplication, from metadata associated with the first and second data.

15. The memory of claim 10, wherein the nonvolatile memory of the second type has a higher read cycle endurance and a lower write cycle endurance than the nonvolatile memory of the first type.

16. The memory of claim 10, further comprising:

a memory mapper, configured to cooperate with the memory manager to map logical addresses and physical addresses in the nonvolatile memory of the first and second types according to placements and relocations of data.