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Method of operating memory device including multi-level memory cells

  • US 9,613,664 B2
  • Filed: 01/20/2015
  • Issued: 04/04/2017
  • Est. Priority Date: 01/20/2015
  • Status: Active Grant
First Claim
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1. A method of operating a memory device including a plurality of multi-level memory cells of which each multi-level memory cell includes L levels, comprising:

  • receiving data which is expressed in a binary number;

    generating a P-length string from the data;

    converting the P-length string to a Q-length string by eliminating at least one level from the L levels, wherein P and Q represent binary bit lengths of the P-length string and the Q-length string, wherein Q is greater than P and wherein L represents a maximum number of levels which each multi-level memory cell has; and

    programming the Q-length string into the plurality of multi-level memory cells,wherein the Q-length string is distributed using I levels,wherein I is smaller than L, andwherein P/Q is equal to or smaller than logL I.

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