Method of operating memory device including multi-level memory cells
First Claim
1. A method of operating a memory device including a plurality of multi-level memory cells of which each multi-level memory cell includes L levels, comprising:
- receiving data which is expressed in a binary number;
generating a P-length string from the data;
converting the P-length string to a Q-length string by eliminating at least one level from the L levels, wherein P and Q represent binary bit lengths of the P-length string and the Q-length string, wherein Q is greater than P and wherein L represents a maximum number of levels which each multi-level memory cell has; and
programming the Q-length string into the plurality of multi-level memory cells,wherein the Q-length string is distributed using I levels,wherein I is smaller than L, andwherein P/Q is equal to or smaller than logL I.
1 Assignment
0 Petitions
Accused Products
Abstract
A method of operating a memory device is provided. The memory device includes a plurality of multi-level memory cells of which each memory cell includes L levels. Data which is expressed in a binary number is received. A P-length string is generated from the data. The P-length string is converted to a Q-length string. The Q-length string is distributed using I levels by eliminating at least one level from the L levels. P and Q represent binary bit lengths of the P-length string and the Q-length string. Q is greater than P. L represents a maximum number of levels which each multi-level memory cell has. I is smaller than L. The Q-length string is programmed into the plurality of memory cells.
-
Citations
9 Claims
-
1. A method of operating a memory device including a plurality of multi-level memory cells of which each multi-level memory cell includes L levels, comprising:
-
receiving data which is expressed in a binary number; generating a P-length string from the data; converting the P-length string to a Q-length string by eliminating at least one level from the L levels, wherein P and Q represent binary bit lengths of the P-length string and the Q-length string, wherein Q is greater than P and wherein L represents a maximum number of levels which each multi-level memory cell has; and programming the Q-length string into the plurality of multi-level memory cells, wherein the Q-length string is distributed using I levels, wherein I is smaller than L, and wherein P/Q is equal to or smaller than logL I. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
-
Specification