Technique for crosstalk reduction
First Claim
1. An arrangement for reducing crosstalk between a first controlled oscillator and a second controlled oscillator both comprised in an integrated circuit, each controlled oscillator (CO) adapted to output a respective clock signal, the arrangement comprising:
- a first detector adapted to detect a crosstalk signal generated by the first controlled oscillator (CO) to the second controlled oscillator (CO);
a first crosstalk cancellation circuit adapted to generate a cancellation signal having an amplitude substantially the same as that of the crosstalk signal and a phase substantially opposite to that of the crosstalk signal; and
a first cancellation signal injector adapted to introduce the cancellation signal into the second CO,wherein the first detector comprises;
a mixer stage adapted to produce a mixed signal (m1(t)) by mixing the clock signal (S1(t)) generated by the second CO with a CO clock signal having a fixed relationship with the clock signal (S1(t)) generated by the second CO;
a filter adapted to at least partially remove at least one or more of one or more DC components and one or more undesired mixing products from the mixed signal (m1(t)) to produce a filtered signal;
a signal converter adapted to down-convert the filtered signal into a DC signal (m2(t)); and
an output for outputting the DC signal as an indication for the crosstalk signal.
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Accused Products
Abstract
A technique for cancelling or reducing crosstalk signals between controlled oscillators in an integrated circuit is provided. The technique involves an arrangement adapted to reduce a crosstalk signal generated by a first controlled oscillator to a second oscillator both comprised in the integrated circuit, wherein both controlled oscillators are configured to output a respective clock signal. The arrangement comprises a detector adapted to detect the crosstalk signal generated by the first controlled oscillator to the second controlled oscillator, a crosstalk cancellation circuit adapted to generate a cancellation signal having an amplitude substantially the same as that of the crosstalk signal and a phase substantially opposite to that of the crosstalk signal, and a cancellation signal injector adapted to introduce the cancellation signal into the second controlled oscillator.
45 Citations
13 Claims
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1. An arrangement for reducing crosstalk between a first controlled oscillator and a second controlled oscillator both comprised in an integrated circuit, each controlled oscillator (CO) adapted to output a respective clock signal, the arrangement comprising:
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a first detector adapted to detect a crosstalk signal generated by the first controlled oscillator (CO) to the second controlled oscillator (CO); a first crosstalk cancellation circuit adapted to generate a cancellation signal having an amplitude substantially the same as that of the crosstalk signal and a phase substantially opposite to that of the crosstalk signal; and a first cancellation signal injector adapted to introduce the cancellation signal into the second CO, wherein the first detector comprises; a mixer stage adapted to produce a mixed signal (m1(t)) by mixing the clock signal (S1(t)) generated by the second CO with a CO clock signal having a fixed relationship with the clock signal (S1(t)) generated by the second CO; a filter adapted to at least partially remove at least one or more of one or more DC components and one or more undesired mixing products from the mixed signal (m1(t)) to produce a filtered signal; a signal converter adapted to down-convert the filtered signal into a DC signal (m2(t)); and an output for outputting the DC signal as an indication for the crosstalk signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A radio communication device, comprising:
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an integrated circuit having a first controlled oscillator and a second controlled oscillator, each of the first controlled oscillator and the second controlled oscillator adapted to output a respective clock signal; an arrangement for reducing a crosstalk signal generated by the first controlled oscillator to the second controlled oscillator, the arrangement comprising; a first detector adapted to detect the crosstalk signal generated by the first controlled oscillator (CO) to the second controlled oscillator (CO); a first crosstalk cancellation circuit adapted to generate a cancellation signal having an amplitude substantially the same as that of the crosstalk signal and a phase substantially opposite to that of the crosstalk signal; and a first cancellation signal injector adapted to introduce the cancellation signal into the second CO, wherein the first detector comprises; a mixer stage adapted to produce a mixed signal (m1(t)) by mixing the clock signal (S1(t)) generated by the second CO with a CO clock signal having a fixed relationship with the clock signal (S1(t)) generated by the second CO; a filter adapted to at least partially remove at least one or more of one or more DC components and one or more undesired mixing products from the mixed signal (m1(t)) to produce a filtered signal; a signal converter adapted to down-convert the filtered signal into a DC signal (m2(t)); and an output for outputting the DC signal as an indication for the crosstalk signal.
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11. A method of reducing a crosstalk signal generated by a first controlled oscillator to a second controlled oscillator both comprised in an integrated circuit, each of the controlled oscillators adapted to output a respective clock signal, the method being performed by an electronic device and comprising the steps of:
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the electronic device detecting a crosstalk signal generated by the first controlled oscillator (CO) to the second controlled oscillator (CO); the electronic device generating a cancellation signal having an amplitude substantially the same as that of the crosstalk signal and a phase substantially opposite to that of the crosstalk signal; the electronic device injecting the cancellation signal into the second CO to reduce the crosstalk signal, the electronic device producing a mixed signal (m1(t)) by mixing the clock signal (S1(t)) generated by the second CO with a CO clock signal having a fixed relationship with the clock signal (S1(t)) generated by the second CO; the electronic device at least partially removing at least one or more of one or more DC components and one or more undesired mixing products from the mixed signal (m1(t)) by filtering to produce a filtered signal; the electronic device down-converting the filtered signal into a DC signal (m2(t)); and the electronic device outputting the DC signal as an indication for the crosstalk signal. - View Dependent Claims (12)
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13. A method of reducing a crosstalk signal generated by a first controlled oscillator to a second controlled oscillator both comprised in an integrated circuit, each of the controlled oscillators adapted to output a respective clock signal, the method being performed by an electronic device and comprising the steps of:
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the electronic device detecting a crosstalk signal generated by the first controlled oscillator (CO) to the second controlled oscillator (CO); the electronic device generating a cancellation signal having an amplitude substantially the same as that of the crosstalk signal and a phase substantially opposite to that of the crosstalk signal; the electronic device injecting the cancellation signal into the second CO to reduce the crosstalk signal; the electronic device detecting a second crosstalk signal generated by the second CO to the first CO; the electronic device generating another cancellation signal having an amplitude substantially the same as that of the second crosstalk signal and a phase substantially opposite to that of the second crosstalk signal; and the electronic device injecting the cancellation signal into the first CO to reduce the second crosstalk signal.
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Specification