System for a backward and forward application environment compatible distributed shared coherent storage

• US 9,619,389 B1
• Filed: 07/10/2014
• Issued: 04/11/2017
• Est. Priority Date: 07/11/2013
• Status: Active Grant

• Current Assignee: Unigen Corporation
• Original Assignee: Unigen Corporation
• Inventors: Roug, Anton
• Primary Examiner(s): Huson, Zachary K
• Application Number:
  US14/328,586
• Time in Patent Office: 1,006 Days
• CPC Class Codes: G06F 11/00 Error detection; Error correction; Monitoring error detection, correction or monitoring in information storage based on relative movement between record carrier and transducer G11B20/18; monitoring, i.e. supervising the progress of recording or reproducing G11B27/36; in static stores G11C29/00
• CPC Class Codes: G06F 12/0811 with multilevel cache hierarchies
• CPC Class Codes: G06F 12/0835 for main memory peripheral accesses (e.g. I/O or DMA)
• CPC Class Codes: G06F 12/0866 for peripheral storage systems, e.g. disk cache
• CPC Class Codes: G06F 13/426 using an embedded synchronisation, e.g. Firewire bus, Fibre Channel bus, SSA bus
• CPC Class Codes: G06F 2212/1024 Latency reduction
• CPC Class Codes: G06F 2212/154 Networked environment
• CPC Class Codes: G06F 2212/313 In storage device
• CPC Class Codes: G06F 3/0607 by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/067 Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]
• CPC Class Codes: H04L 67/1097 for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS]

Abstract

A method for implementing a storage architecture on a storage board is disclosed. The method comprises enabling the storage board on a first application node of an application server in a shared network comprising a plurality of application nodes and a plurality of storage nodes. The method also comprises processing a read or write request from an application on the first application node and profiling data transmitted in the request to determine the manner in which to process the request. Further, the method comprises accessing one of a plurality of tiers of storage media to perform a read or write responsive to the request, wherein each tier of storage media can be distributed over multiple nodes. Finally, the method comprises updating a first cache based on a configuration policy and maintaining coherency between shared data in the first cache and caches implemented on other storage boards in the network.

Claims

1. A method for implementing a storage architecture on a storage board, said method comprising:

enabling said storage board on a first application node of an application server in a shared network comprising a plurality of application nodes and a plurality of storage nodes;

using a storage access processing module, processing a read or write request from an application on said first application node and profiling data transmitted in said request to determine a manner in which to process said request;

using a storage tier processing module, accessing one of a plurality of tiers of storage media to perform a read or write responsive to said request, wherein each tier of storage media is operable to be distributed over multiple application nodes or multiple storage nodes; and

based on a configuration policy, updating a first cache using said storage access processing module and maintaining coherency between shared data in said first cache and caches implemented on respective storage boards in said plurality of application nodes.

2. The method of claim 1, wherein said storage tier processing module and said storage access processing module are configured on a processor executing on said storage board.

3. The method of claim 1, wherein said enabling comprises:

enabling plug and play integration between said storage board and said first application node.

4. The method of claim 3, wherein said enabling further comprises:

enabling plug and play integration between the storage board and a plurality of storage media coupled to said first application node.

5. The method of claim 3, wherein said enabling further comprises:

communicating between said storage board and said first application node using a PCIe interface.

6. The method of claim 5, wherein said PCIe interface supports block and persistent memory storage based on a standard selected from a group consisting of:

Advanced Host Controller Interface (AHCI), NVM Express (NVMe), SCSI Express (SCSIe), PCIe G2, PCIe G3, PCIe G3 and SNIA Persistent Memory Architecture.

7. The method of claim 5, wherein said PCIe interface is implemented using a Field Programmable Gate Array (FPGA) device, an integrated Application Specific Integrated Circuit (ASIC) and a standard microprocessor.

8. The method of claim 1, further comprising connecting said storage board to other storage boards in said plurality of application nodes in said shared network using a rack interconnect, wherein said rack interconnect is a non-transparent PCIe bridge.

9. A system for implementing a storage architecture on a storage board, said system comprising:

a storage board enabled on a first application node of an application server in a shared network comprising a plurality of application nodes and a plurality of storage nodes;

a storage access processing module operable to process a read or write request from an application on said first application node and profile data transmitted in said request to determine a manner in which to process said request;

a storage tier processing module operable to access one of a plurality of tiers of storage media to perform a read or write responsive to said request, wherein each tier of storage media can be distributed over multiple application nodes or multiple storage nodes;

a first cache operable to be updated by said storage access processing module based on a configuration policy; and

a cache management module operable to maintain coherency of shared data between said first cache and caches implemented on respective storage boards in said plurality of application nodes.

10. The system of claim 9, wherein said storage access processing module and said storage tier processing module are configured on a processor executing on said storage board.

11. The system of claim 10, wherein said storage tier processing module configured on said processor is further operable to coherently store and access fragmented data on a plurality of storage media, wherein said plurality of storage media is coupled to said plurality of application nodes and said plurality of storage nodes, and wherein said fragmented data is encoded using a distributed encoding policy.

12. The system of claim 9, wherein said storage board is further operable to provide a processing platform for plug and play integration with said first application node.

13. The system of claim 9, wherein said storage board is further operable to provide a processing platform for plug and play integration with a plurality of storage media coupled to said first application node.

14. The system of claim 12, wherein said storage board and said first application node communicate using a PCIe interface.

15. The system of claim 14, wherein said PCIe interface can supports block and persistent memory storage based on a standard selected from a group consisting of:

Advanced Host Controller Interface (AHCI), NVM Express (NVMe), SCSI Express (SCSIe), PCIe G2, PCIe G3, PCIe G3 and SNIA Persistent Memory Architecture.

16. The system of claim 14, wherein said PCIe interface is implemented using a Field Programmable Gate Array (FPGA) device, an integrated Application Specific Integrated Circuit (ASIC) and a standard microprocessor.

17. The system of claim 9, wherein said storage board is operable to couple to other storage boards in said plurality of application nodes in said shared network using a rack interconnect, wherein said rack interconnect is a non-transparent PCIe bridge.

20. The system of claim 9, wherein said processor on said storage board communicates with said first application node over a PCIe interface and wherein said processor provides a platform for plug and play integration with said first application node.

18. A microprocessor that implements a storage architecture on a storage board, said microprocessor comprising:

a storage access processing module operable to process a read or write request from an application on a first application node and profile data transmitted in said request to determine a manner in which to process said request, wherein said storage board is enabled on said first application node of an application server in a shared network comprising a plurality of application nodes and a plurality of storage nodes;

a storage tier processing module operable to access one of a plurality of tiers of storage media to perform a read or write responsive to said request, wherein each tier of the storage media is operable to be distributed over multiple application nodes or multiple storage nodes;

a first cache operable to be updated by said storage access processing module based on a configuration policy; and

a cache management module operable to maintain coherency of shared data in said first cache with caches implemented on respective storage boards in said plurality of application nodes.

19. The system of claim 18, wherein said storage tier processing module is further operable to coherently store and access fragmented data on a plurality of storage media, wherein said plurality of storage media is connected to said plurality of application nodes and said plurality of storage nodes, and wherein said fragmented data is encoded using a distributed encoding policy.