Determining categories for memory fail conditions
First Claim
1. A computer-implemented method comprising:
- checking one or more memory cells for a malfunction;
creating a relational data structure comprising a plurality of interlinked nodes and a root node such that each test parameter configuration of a set of test parameter configurations for which a malfunction has been detected is represented by a path, wherein test parameters associated with the test parameter configurations are assigned to one or more nodes of the plurality of interlinked nodes of the path according to a defined order starting from the root node, wherein each path is assigned a detected bit fail count for the path'"'"'s respective test parameter configuration;
combining one or more segments of the relational data structure according to a predefined rule for obtaining one or more test groups;
creating a representation of the bit fail counts of the respective test groups;
applying a filter to the relational data structure including the test groups in order to identify test parameter configurations categories to be further analyzed;
storing, for each test parameter configurations for which a malfunction is detected, a bit fail map comprising information about a spatial distribution pattern of the malfunctioning memory cells; and
determining a spatial distribution pattern of memory cells to be further analyzed using the parameter configuration categories to be further analyzed and the bit fail map.
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Accused Products
Abstract
Embodiments of the present invention provide methods, program products, and systems for testing a memory cell arrangement. Embodiments of the present invention can determine categories of memory fail conditions by checking memory cells of with a sequence of test parameter configurations for a malfunction using test parameters, storing for test parameter configurations for which a malfunction is detected, and assigning the respective test parameter configuration with a bit fail count comprising the number of malfunctioning memory cells. Embodiments of the present invention can be used to create a relational data structure representing test parameter configurations and can combine one or more test parameter configurations and can create a representation of the bit fail counts of the respective test parameter configurations.
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Citations
20 Claims
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1. A computer-implemented method comprising:
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checking one or more memory cells for a malfunction; creating a relational data structure comprising a plurality of interlinked nodes and a root node such that each test parameter configuration of a set of test parameter configurations for which a malfunction has been detected is represented by a path, wherein test parameters associated with the test parameter configurations are assigned to one or more nodes of the plurality of interlinked nodes of the path according to a defined order starting from the root node, wherein each path is assigned a detected bit fail count for the path'"'"'s respective test parameter configuration; combining one or more segments of the relational data structure according to a predefined rule for obtaining one or more test groups; creating a representation of the bit fail counts of the respective test groups; applying a filter to the relational data structure including the test groups in order to identify test parameter configurations categories to be further analyzed; storing, for each test parameter configurations for which a malfunction is detected, a bit fail map comprising information about a spatial distribution pattern of the malfunctioning memory cells; and determining a spatial distribution pattern of memory cells to be further analyzed using the parameter configuration categories to be further analyzed and the bit fail map. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A computer program product comprising:
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program instructions to check one or more memory cells for a malfunction; one or more computer readable storage media and program instructions stored on the one or more computer readable storage media, the program instructions comprising; program instructions to create a relational data structure comprising a plurality of interlinked nodes and a root node such that each test parameter configuration of a set of test parameter configurations for which a malfunction has been detected is represented by a path, wherein test parameters associated with the test parameter configurations are assigned to one or more nodes of the plurality of interlinked nodes of the path according to a defined order starting from the root node, wherein each path is assigned a detected bit fail count for the path'"'"'s respective test parameter configuration; program instructions to combine one or more segments of the relational data structure according to a predefined rule for obtaining one or more test groups; program instructions to create a representation of the bit fail counts of the respective test groups; program instructions to apply a filter to the relational data structure including the test groups in order to identify test parameter configurations categories to be further analyzed; program instructions to store, for each test parameter configurations for which a malfunction is detected, a bit fail map comprising information about a spatial distribution pattern of the malfunctioning memory cells; and program instructions to determine a spatial distribution pattern of memory cells to be further analyzed using the parameter configuration categories to be further analyzed and the bit fail map. - View Dependent Claims (18, 19)
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20. A computer system comprising:
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one or more computer processors; one or more computer readable storage media; and program instructions stored on the one or more computer readable storage media for execution by at least one of the one or more computer processors, the program instructions comprising; program instructions to check one or more memory cells for a malfunction; program instructions to create a relational data structure comprising a plurality of interlinked nodes and a root node such that each test parameter configuration of a set of test parameter configurations for which a malfunction has been detected is represented by a path, wherein test parameters associated with the test parameter configurations are assigned to one or more nodes of the plurality of interlinked nodes of the path according to a defined order starting from the root node, wherein each path is assigned a detected bit fail count for the path'"'"'s respective test parameter configuration; program instructions to combine one or more segments of the relational data structure according to a predefined rule for obtaining one or more test groups; program instructions to create a representation of the bit fail counts of the respective test groups; program instructions to apply a filter to the relational data structure including the test groups in order to identify test parameter configurations categories to be further analyzed; program instructions to store, for each test parameter configurations for which a malfunction is detected, a bit fail map comprising information about a spatial distribution pattern of the malfunctioning memory cells; and program instructions to determine a spatial distribution pattern of memory cells to be further analyzed using the parameter configuration categories to be further analyzed and the bit fail map.
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Specification