Semiconductor device
First Claim
1. A semiconductor device comprising:
- a semiconductor chip formed with an SiC-IGBT (Insulated Gate Bipolar Semiconductor) including;
an SiC semiconductor layer having a first surface and a second surface,a first conductive-type collector region formed such that the collector region is exposed on the second surface of the SiC semiconductor layer,a second conductive-type base region formed closer to the first surface of the SiC semiconductor layer with respect to the collector region such that the base region is in contact with the collector region,a first conductive-type channel region formed closer to the first surface of the SiC semiconductor layer with respect to the base region such that the channel region is in contact with the base region,a second conductive-type emitter region formed closer to the first surface of the SiC semiconductor layer with respect to the channel region such that the emitter region is in contact with the channel region, the emitter region defining a portion of the first surface of the SiC semiconductor layer,a collector electrode formed such that the collector electrode is in contact with the second surface of the SiC semiconductor layer, the collector electrode connected to the collector region, andan emitter electrode formed such that the emitter electrode is in contact with the first surface of the SiC semiconductor layer, the emitter electrode connected to the emitter region;
a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) connected in parallel to the SiC-IGBT, the MOSFET including;
a second conductive-type source region electrically connected to the emitter electrode, anda second conductive-type drain region electrically connected to the collector electrode; and
a Schottky barrier diode connected in parallel to the SiC-IGBT including;
a second conductive-type drift region,an anode electrode forming a Schottky junction with the drift region and electrically connected to the emitter electrode, anda cathode electrode in ohmic contact with the drift region electrically connected to the collector electrode;
wherein the semiconductor chip is arranged such that;
the base region includes a base surficial portion exposed on the first surface of the SiC semiconductor layer to define a portion of the first surface,the emitter electrode includes a Schottky joint portion forming a Schottky junction with the base surficial portion,the Schottky barrier diode includes an SiC-Schottky barrier diode provided in the semiconductor chip,the drift region is formed utilizing the base region of the SiC-IGBT, andthe anode electrode is formed utilizing the emitter electrode of the SiC-IGBT.
1 Assignment
0 Petitions
Accused Products
Abstract
A semiconductor device includes a semiconductor chip formed with an SiC-IGBT including an SiC semiconductor layer, a first conductive-type collector region formed such that the collector region is exposed on a second surface of the SiC semiconductor layer, a second conductive-type base region formed such that the base region contacts the collector region, a first conductive-type channel region formed such that the channel region contacts the base region, a second conductive-type emitter region formed such that the emitter region contacts the channel region to define a portion of a first surface of the SiC semiconductor layer, a collector electrode connected to the collector region, and an emitter electrode connected to the emitter region. A MOSFET of the device is connected in parallel to the SiC-IGBT, and includes a second conductive-type source region electrically connected to the emitter electrode and a second conductive-type drain region electrically connected to the collector electrode.
15 Citations
31 Claims
-
1. A semiconductor device comprising:
-
a semiconductor chip formed with an SiC-IGBT (Insulated Gate Bipolar Semiconductor) including; an SiC semiconductor layer having a first surface and a second surface, a first conductive-type collector region formed such that the collector region is exposed on the second surface of the SiC semiconductor layer, a second conductive-type base region formed closer to the first surface of the SiC semiconductor layer with respect to the collector region such that the base region is in contact with the collector region, a first conductive-type channel region formed closer to the first surface of the SiC semiconductor layer with respect to the base region such that the channel region is in contact with the base region, a second conductive-type emitter region formed closer to the first surface of the SiC semiconductor layer with respect to the channel region such that the emitter region is in contact with the channel region, the emitter region defining a portion of the first surface of the SiC semiconductor layer, a collector electrode formed such that the collector electrode is in contact with the second surface of the SiC semiconductor layer, the collector electrode connected to the collector region, and an emitter electrode formed such that the emitter electrode is in contact with the first surface of the SiC semiconductor layer, the emitter electrode connected to the emitter region; a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) connected in parallel to the SiC-IGBT, the MOSFET including; a second conductive-type source region electrically connected to the emitter electrode, and a second conductive-type drain region electrically connected to the collector electrode; and a Schottky barrier diode connected in parallel to the SiC-IGBT including; a second conductive-type drift region, an anode electrode forming a Schottky junction with the drift region and electrically connected to the emitter electrode, and a cathode electrode in ohmic contact with the drift region electrically connected to the collector electrode; wherein the semiconductor chip is arranged such that; the base region includes a base surficial portion exposed on the first surface of the SiC semiconductor layer to define a portion of the first surface, the emitter electrode includes a Schottky joint portion forming a Schottky junction with the base surficial portion, the Schottky barrier diode includes an SiC-Schottky barrier diode provided in the semiconductor chip, the drift region is formed utilizing the base region of the SiC-IGBT, and the anode electrode is formed utilizing the emitter electrode of the SiC-IGBT. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
-
-
19. A semiconductor device comprising:
-
a semiconductor chip formed with an SiC-IGBT (Insulated Gate Bipolar Semiconductor) including; an SiC semiconductor layer having a first surface and a second surface, a first conductive-type collector region formed such that the collector region is exposed on the second surface of the SiC semiconductor layer, a second conductive-type base region formed closer to the first surface of the SiC semiconductor layer with respect to the collector region such that the base region is in contact with the collector region, a first conductive-type channel region formed closer to the first surface of the SiC semiconductor layer with respect to the base region such that the channel region is in contact with the base region, a second conductive-type emitter region formed closer to the first surface of the SiC semiconductor layer with respect to the channel region such that the emitter region is in contact with the channel region, the emitter region defining a portion of the first surface of the SiC semiconductor layer, a collector electrode formed such that the collector electrode is in contact with the second surface of the SiC semiconductor layer, the collector electrode connected to the collector region, and an emitter electrode formed such that the emitter electrode is in contact with the first surface of the SiC semiconductor layer, the emitter electrode connected to the emitter region; and a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) connected in parallel to the SiC-IGBT, the MOSFET including; a second conductive-type source region electrically connected to the emitter electrode, and a second conductive-type drain region electrically connected to the collector electrode; wherein the base region is partially exposed on the first surface of the SiC semiconductor layer; wherein the semiconductor chip includes; a Schottky electrode formed such that the Schottky electrode is in contact with the exposed portion of the base region, and a trench dug from the first surface of the SiC semiconductor layer at a position adjacent to a joint portion between the base region and the Schottky electrode, the trench having a bottom surface and a side surface; and wherein the SiC semiconductor layer includes a first conductive-type electric field relaxing portion selectively formed on the bottom surface and on an edge portion of the bottom surface of the trench. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30)
-
-
31. A semiconductor device comprising:
-
a semiconductor chip formed with an SiC-IGBT (Insulated Gate Bipolar Semiconductor) including; an SiC semiconductor layer having a first surface and a second surface, a first conductive-type collector region formed such that the collector region is exposed on the second surface of the SiC semiconductor layer, a second conductive-type base region formed closer to the first surface of the SiC semiconductor layer with respect to the collector region such that the base region is in contact with the collector region, a first conductive-type channel region formed closer to the first surface of the SiC semiconductor layer with respect to the base region such that the channel region is in contact with the base region, a second conductive-type emitter region formed closer to the first surface of the SiC semiconductor layer with respect to the channel region such that the emitter region is in contact with the channel region, the emitter region defining a portion of the first surface of the SiC semiconductor layer, a collector electrode formed such that the collector electrode is in contact with the second surface of the SiC semiconductor layer, the collector electrode connected to the collector region, and an emitter electrode formed such that the emitter electrode is in contact with the first surface of the SiC semiconductor layer, the emitter electrode connected to the emitter region; and a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) connected in parallel to the SiC-IGBT, the MOSFET including; a second conductive-type source region electrically connected to the emitter electrode, and a second conductive-type drain region electrically connected to the collector electrode; wherein the base region includes a drift region having a first impurity concentration in contact with the channel region and a buffer region formed such that the buffer region surrounds the collector region between the drift region and the collector region and having a second impurity concentration higher than the first impurity concentration.
-
Specification