Microcode data recovery strategies for use of iterative decode
First Claim
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1. A method for data error recovery in a tape storage system, by a processor device, comprising:
- in a tape storage system using an iterative hardware decoder, dynamically initializing at least one microcode iterative decode cycle on a buffered dataset, each iterative decode cycle providing an error feedback loop;
initiating n microcode iterative decode cycles on the buffered dataset while tape is at speed;
wherein n comprises a number of microcode iterative decode cycles able to complete without stopping the tape due to buffering; and
initiating x microcode iterative decode cycles on the buffered dataset while the tape is stopped;
wherein x comprises at least one of a plurality of the microcode iterative decode cycles.
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Abstract
Various embodiments for data error recovery in a tape storage system, by a processor device, are provided. In one embodiment, a method comprises, in a tape storage system using an iterative hardware decoder, dynamically initializing at least one microcode-initiated decode cycle on a buffered dataset, each iterative decode cycle providing an error feedback loop.
22 Citations
24 Claims
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1. A method for data error recovery in a tape storage system, by a processor device, comprising:
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in a tape storage system using an iterative hardware decoder, dynamically initializing at least one microcode iterative decode cycle on a buffered dataset, each iterative decode cycle providing an error feedback loop; initiating n microcode iterative decode cycles on the buffered dataset while tape is at speed;
wherein n comprises a number of microcode iterative decode cycles able to complete without stopping the tape due to buffering; andinitiating x microcode iterative decode cycles on the buffered dataset while the tape is stopped;
wherein x comprises at least one of a plurality of the microcode iterative decode cycles. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A system for data error recovery in a tape storage system, comprising:
at least one processor device, wherein the at least one processor device; in a tape storage system using an iterative hardware decoder, dynamically initializes at least one microcode iterative decode cycle on a buffered dataset, each iterative decode cycle providing an error feedback loop, initiates n microcode iterative decode cycles on the buffered dataset while tape is at speed;
wherein n comprises a number of microcode iterative decode cycles able to complete without stopping the tape due to buffering, andinitiates x microcode iterative decode cycles on the buffered dataset while the tape is stopped;
wherein x comprises at least one of a plurality of the microcode iterative decode cycles.- View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A computer program product for data error recovery in a tape storage system by at least one processor device, the computer program product embodied on a non-transitory computer-readable storage medium having computer-readable program code portions stored therein, the computer-readable program code portions comprising:
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an executable portion that, in a tape storage system using an iterative hardware decoder, dynamically initializes at least one microcode iterative decode cycle on a buffered dataset, each iterative decode cycle providing an error feedback loop; an executable portion that initiates n microcode iterative decode cycles on the buffered dataset while tape is at speed;
wherein n comprises a number of microcode iterative decode cycles able to complete without stopping the tape due to buffering; andan executable portion that initiates x microcode iterative decode cycles on the buffered dataset while the tape is stopped;
wherein x comprises at least one of a plurality of the microcode iterative decode cycles. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24)
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Specification