Power efficient, variable sampling rate delta-sigma data converters for flexible radio communication systems

• US 9,622,181 B2
• Filed: 11/06/2015
• Issued: 04/11/2017
• Est. Priority Date: 11/06/2014
• Status: Active Grant

• Current Assignee: GM Global Technology Operations LLC (General Motors Company)
• Original Assignee: GM Global Technology Operations LLC (General Motors Company)
• Inventors: Talty, Timothy J., Baringer, Cynthia D., Ahmed, Mohiuddin, Cosand, Albert E., Li, James Chingwei, Petre, Peter, Xu, Zhiwei A., Kuan, Yen-Cheng
• Primary Examiner(s): Lee, John J
• Application Number:
  US15/103,306
• Publication Number:
  US 20160337979A1
• Time in Patent Office: 522 Days
• Field of Search: 455522, 4554521, 455 6711, 455 69, 455572, 455574, 455509
• CPC Class Codes: H04B 1/0007 wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
• CPC Class Codes: H04B 1/0057 using diplexing or multiplexing filters for selecting the desired band
• CPC Class Codes: H04B 1/0483 Transmitters with multiple parallel paths
• CPC Class Codes: H04B 1/18 Input circuits, e.g. for coupling to an antenna or a transmission line coupling networks between antennas or lines and receivers independent of the nature of the receiver H03H
• CPC Class Codes: H04B 1/3822 specially adapted for use in vehicles H04B1/3827 takes precedence
• CPC Class Codes: H04B 1/40 Circuits
• CPC Class Codes: H04B 1/52 Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
• CPC Class Codes: H04B 14/06 using differential modulation, e.g. delta modulation
• CPC Class Codes: H04W 52/0261 managing power supply demand, e.g. depending on battery level
• CPC Class Codes: H04W 52/0274 by switching on or off the equipment or parts thereof
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

A method for reducing power consumption in a transceiver front-end circuit for a cellular radio. The transceiver circuit includes a receiver module having a delta-sigma modulator that converts analog receive signals to a representative digital signal in an interleaving process, where the delta-sigma modulator includes a low noise amplifier (LNA), an LC filter and a quantizer circuit. The LC filter is a multi-order filter and the quantizer circuit is an interleaving quantizer circuit that interleaves multiple groups of bits from the filter. The method includes selectively reducing the order of the LC filter in situations where a full dynamic range of the cellular radio is not required and reducing a bit resolution of the quantizer circuit so as to reduce the power requirements of the cellular radio.

Claims

1. A method for reducing power consumption in a transceiver front-end circuit for a cellular radio, said method comprising:

providing an antenna structure that transmits signals and receives signals;

providing a multiplexer coupled to the antenna structure and including multiple signal paths, each signal path including a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals;

providing a receiver module including a separate signal channel for each signal path in the multiplexer, each signal channel in the receiver module including a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal in an interleaving process, each receiver delta-sigma modulator including a combiner, a low noise amplifier (LNA), an LC filter and a quantizer circuit, said LC filter being a multi-order filter; and

selectively reducing an order of the LC filter in situations where a full dynamic range of the cellular radio is not required so as to reduce power requirements of the cellular radio.

2. The method according to claim 1 wherein the LC filter is a sixth-order filter and reducing the order of the LC filter includes reducing the order of the filter to be a fourth-order filter or a second-order filter.

3. The method according to claim 2 wherein the LC filter includes a plurality of LC resonator circuits, a plurality of transconductance amplifiers and a plurality of integrator circuits, where a combination of one resonator circuit, transconductance amplifier and integrator circuit represents a two-order stage of the LC filter, and wherein reducing the order of the filter includes removing one or more combinations of a resonator circuit, transconductance amplifier and integrator circuit.

4. The method according to claim 1 wherein the quantizer circuit is an interleaving quantizer circuit that interleaves multiple groups of bits from the filter, said method further comprising selectively reducing a bit resolution of the quantizer circuit so as to reduce the power requirements of the cellular radio.

5. The method according to claim 4 wherein the quantizer circuit includes a plurality of groups of analog-to-digital converters (ADCs) and digital-to-analog converters (DACs), wherein the ADCs receive the filtered error signal from the filter, and wherein the bits from the ADCs are provided to the DACs in the interleaving process, and wherein the output of the DACs is provided to the combiner.

6. The method according to claim 5 wherein the plurality of ADCs and DACs are 4-bit or 3-bit ADCs and DACs, and wherein selectively reducing a bit resolution of the quantizer circuit includes reducing the operation of the ADCs and the DACs from 4-bits to 1-bit or 3-bits to 1-bit.

7. The method according to claim 1 wherein the combiner receives an estimation of the receive signal from the quantizer circuit and provides an error signal, said error signal being provided to the LNA, an amplified error signal from the LNA being provided to the LC filter, and a filter error signal being provided to the quantizer circuit.

8. The method according to claim 1 wherein each signal channel includes a summation node that receives an amplified receive signal from the LNA and an estimation of the receive signal from the quantizer circuit and provides an error signal to the LC filter.

9. The method according to claim 1 further comprising providing a clock circuit that provides clocking signals to the receiver module and reducing the clock rate of the clock circuit to remove the interleaving process in the quantizer circuits so as to reduce the power requirements of the cellular radio.

10. The method according to claim 1 further comprising providing a transmitter module including a transmitter delta-sigma modulator for converting digital data bits to the transmit signals, said transmitter module further including a tunable bandpass filter, a power amplifier and a switch for directing the transmit signals to one of the signal paths in the multiplexer, wherein each receive channel includes a feedback digital-to-analog (DAC) converter that receives the transmit signal and provides the transmit signal to the combiner, said method further comprising disabling the feedback DAC when the transmit signal is not present so as to reduce the power requirements of the cellular radio.

11. The method according to claim 10 wherein the transmitter delta-sigma modulator includes a dynamic element matching (DEM) circuit that employs an interleaving DEM algorithm, said method further comprising reducing scrambling of usage patterns in elements of the DEM circuit so as to reduce the power requirements of the cellular radio.

12. The method according to claim 1 wherein the cellular radio is an automobile cellular radio.

13. A method for reducing power consumption in a transceiver front-end circuit for a cellular radio, said method comprising:

providing a receiver module including a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal in an interleaving process, said receiver delta-sigma modulator including a combiner, a low noise amplifier (LNA), an LC filter and a quantizer circuit, said combiner receiving receive signals and a feedback signal from the quantizer circuit and providing an error signal to the LNA to provide an amplified error signal, said amplifier error signal being provided to the LC filter to provide a filtered error signal, and the filtered error signal being provided to the quantizer circuit, said LC filter being a multi-order filter, wherein the quantizer circuit is an interleaving quantizer circuit that interleaves multiple groups of bits from the LC filter;

selectively reducing an order of the LC filter in situations where a full dynamic range of the cellular radio is not required so as to reduce the power requirements of the cellular radio; and

selectively reducing a bit resolution of the quantizer circuit so as to reduce power requirements of the cellular radio.

14. The method according to claim 13 wherein the LC filter is a sixth-order filter and reducing the order of the LC filter includes reducing the order of the filter to be a fourth-order filter or a second-order filter.

15. The method according to claim 14 wherein the LC filter includes a plurality of LC resonator circuits, a plurality of transconductance amplifiers and a plurality of integrator circuits, where a combination of one resonator circuit, transconductance amplifier and integrator circuit represents a two-order stage of the LC filter, and wherein reducing the order of the filter includes removing one or more combinations of a resonator circuit, transconductance amplifier and integrator circuit.

16. The method according to claim 13 wherein the quantizer circuit is an interleaving quantizer circuit that interleaves multiple groups of bits from the filter, said method further comprising selectively reducing a bit resolution of the quantizer circuit so as to reduce the power requirements of the cellular radio.

17. A method for reducing power consumption in a transceiver front-end circuit for a cellular radio, said method comprising:

providing a receiver module including a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal in an interleaving process, said receiver delta-sigma modulator including a low noise amplifier (LNA), a summation node, an LC filter and a quantizer circuit, said summation node receiving amplified receive signals from the LNA and a feedback signal from the quantizer circuit and providing an error signal to the LC filter to provide a filtered error signal, said filtered error signal being provided to the quantizer circuit, said LC filter being a multi-order filter, wherein the quantizer circuit is an interleaving quantizer circuit that interleaves multiple groups of bits from the LC filter;

selectively reducing an order of the LC filter in situations where a full dynamic range of the cellular radio is not required so as to reduce the power requirements of the cellular radio; and

selectively reducing a bit resolution of the quantizer circuit so as to reduce power requirements of the cellular radio.

18. The method according to claim 17 wherein the LC filter is a sixth-order filter and reducing the order of the LC filter includes reducing the order of the filter to be a fourth-order filter or a second-order filter.

19. The method according to claim 18 wherein the LC filter includes a plurality of LC resonator circuits, a plurality of transconductance amplifiers and a plurality of integrator circuits, where a combination of one resonator circuit, transconductance amplifier and integrator circuit represents a two-order stage of the LC filter, and wherein reducing the order of the filter includes removing one or more combinations of a resonator circuit, transconductance amplifier and integrator circuit.

20. The method according to claim 17 wherein the quantizer circuit is an interleaving quantizer circuit that interleaves multiple groups of bits from the filter, said method further comprising selectively reducing a bit resolution of the quantizer circuit so as to reduce the power requirements of the cellular radio.