Power converter for a memory module

• US 9,627,028 B2
• Filed: 09/02/2014
• Issued: 04/18/2017
• Est. Priority Date: 12/17/2010
• Status: Active Grant

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Enpirion, Inc. (MediaTek, Inc.)
• Inventors: Mera, Narciso, Lopata, Douglas Dean, Lotfi, Ashraf W.
• Primary Examiner(s): Dinh, Son
• Assistant Examiner(s): Tran, Uyen B
• Application Number:
  US14/474,746
• Publication Number:
  US 20140369147A1
• Time in Patent Office: 959 Days
• CPC Class Codes: G11C 11/4074 Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
• CPC Class Codes: G11C 5/147 Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops G11C5/141 takes precedence
• CPC Class Codes: H02M 7/4837 Flying capacitor converters

Abstract

An apparatus including a memory module and power converter and method of operating the same. In one embodiment, the apparatus includes a memory module, located on a circuit board, configured to operate from a first voltage and a second voltage being a multiple of the first voltage. The apparatus also includes a power converter employing a switched-capacitor power train, located on the circuit board, configured to provide the second voltage for the memory module from the first voltage.

Claims

1. An apparatus, comprising:

first and second memory modules, located on a circuit board, configured to operate from a first voltage and a second voltage always being an integer multiple of said first voltage; and

a power converter employing a switch-mode power train, located on said circuit board, comprising a plurality of switches configured to provide said second voltage to said first and second memory modules from said first voltage by controlling a plurality of switching frequencies of the plurality of switches, wherein at least one of the plurality of switches is coupled to a capacitor configured to store said second voltage, and wherein path resistances associated with circuit board traces on said circuit board from said power converter to said first and second memory modules are substantially balanced.

2. The apparatus as recited in claim 1 wherein said first voltage represents an input voltage to said power converter and said second voltage represents an output voltage of said power converter.

3. The apparatus as recited in claim 1 wherein a voltage drop between said power converter and said first and second memory modules is substantially equal.

4. The apparatus as recited in claim 1 wherein said power converter is substantially centrally located on said circuit board.

5. The apparatus as recited in claim 1 wherein said power converter is operable in a light-load mode of operation with a switching frequency dependent on a current drain of said first and second memory modules at said second voltage.

6. The apparatus as recited in claim 1 wherein the plurality of power switches of said switch-mode power train are alternately enabled to conduct to provide said second voltage as an output voltage of said power converter.

7. The apparatus as recited in claim 1 wherein said power converter is embodied in a silicon die coupled to a leadframe through solder bumps.

8. The apparatus as recited in claim 7 wherein said solder bumps are copper.

9. The apparatus as recited in claim 1 wherein said integer multiple is always one-half.

10. The apparatus as recited in claim 1 wherein said first and second memory modules are digital random-access memory modules.

11. A method, comprising:

providing a first voltage to first and second memory modules located on a circuit board; and

providing a second voltage always being a one-half integer multiple of said first voltage to said first and second memory modules with a power converter employing a switch-mode power train located on said circuit board, wherein path resistances associated with circuit board traces on said circuit board from said power converter to said first and second memory modules are substantially balanced.

12. The method as recited in claim 11 wherein said first voltage represents an input voltage to said power converter and said second voltage represents an output voltage of said power converter.

13. The method as recited in claim 11 wherein a voltage drop between said power converter and said first and second memory modules is substantially equal.

14. The method as recited in claim 11 wherein said power converter is substantially centrally located on said circuit board.

15. The method as recited in claim 11 further comprising operating said power converter in a light-load mode of operation with a switching frequency dependent on a current drain of said first and second memory modules at said second voltage.

16. The method as recited in claim 11 further comprising alternately enabling conduction of power switches of said switch-mode power train to provide said second voltage as an output voltage of said power converter.

17. The method as recited in claim 11 wherein said power converter is embodied in a silicon die coupled to a leadframe through solder bumps.

18. The method as recited in claim 17 wherein said solder bumps are copper.

19. The method as recited in claim 11 wherein said first and second memory modules are digital random-access memory modules.