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Method and structure for enabling controlled spacer RIE

  • US 9,627,277 B2
  • Filed: 06/09/2015
  • Issued: 04/18/2017
  • Est. Priority Date: 06/09/2015
  • Status: Active Grant
First Claim
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1. A method of forming a semiconductor structure, said method comprising:

  • providing a plurality of semiconductor fins extending upwards from a surface of a substrate, and a plurality of sacrificial spacer fins extending upwards from another surface of said substrate;

    forming a sacrificial gate structure straddling over a portion of each semiconductor fin and each sacrificial spacer fin;

    forming a dielectric spacer material surrounding said sacrificial gate structure, wherein said dielectric spacer material and each sacrificial spacer fin comprise a same dielectric material; and

    performing a spacer reactive ion etch to said dielectric spacer material to provide a dielectric spacer on sidewall surfaces of said sacrificial gate structure, wherein during said spacer reactive ion etch exposed portions of each sacrificial spacer fin are removed, while maintaining a portion of each sacrificial spacer fin beneath said dielectric spacer and said sacrificial gate structure.

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