Semiconductor device and method of forming ultra high density embedded semiconductor die package

• US 9,627,338 B2
• Filed: 02/21/2014
• Issued: 04/18/2017
• Est. Priority Date: 03/06/2013
• Status: Active Grant

• Current Assignee: JCET Semiconductor (Shaoxing) Co., Ltd.
• Original Assignee: Stats Chippac Pte. Ltd. (JCET Group Co., Ltd.)
• Inventors: Lim, See Chian, Tan, Teck Tiong, Hsiao, Yung Kuan, Fang, Ching Meng, Phua, Yoke Hor, Liao, Bartholomew
• Primary Examiner(s): Stark, Jarrett
• Application Number:
  US14/187,014
• Publication Number:
  US 20140252641A1
• Time in Patent Office: 1,152 Days
• CPC Class Codes: H01L 21/56 Encapsulations, e.g. encapsulation layers, coatings
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 21/768 Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/11 Manufacturing methods
• CPC Class Codes: H01L 2224/12105 Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
• CPC Class Codes: H01L 2224/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 2224/96 the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/145 Organic substrates, e.g. plastic
• CPC Class Codes: H01L 23/15 Ceramic or glass substrates H01L23/142, H01L23/145, H01L23/147 take precedence
• CPC Class Codes: H01L 23/295 containing a filler H01L23/296 takes precedence
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/3135 Double encapsulation or coating and encapsulation
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 23/562 Protection against mechanical damage H01L23/02, H01L23/28 take precedence
• CPC Class Codes: H01L 24/11 Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/16 of an individual bump connector
• CPC Class Codes: H01L 24/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/20 Structure, shape, material or disposition of high density interconnect preforms
• CPC Class Codes: H01L 24/96 : the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/12 : Passive devices, e.g. 2 terminal devices
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/1306 : Field-effect transistor [FET]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H01L 2924/3511 : Warping

Abstract

A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die. A second prefabricated insulating film is disposed over the first prefabricated insulating film.

Claims

1. A method of making a semiconductor device, comprising:

providing a reinforced insulating film;

disposing a conductive layer on a first surface of the reinforced insulating film;

disposing a semiconductor die in contact with a second surface of the reinforced insulating film;

disposing a prefabricated laminating layer over the semiconductor die, wherein the prefabricated laminating layer extends completely over the semiconductor die; and

laminating the prefabricated laminating layer over the reinforced insulating film by applying pressure to the prefabricated laminating layer against the semiconductor die to embed the semiconductor die in the prefabricated laminating layer and expose an active surface of the semiconductor die from the prefabricated laminating layer opposite the reinforced insulating film, wherein a thickness of the prefabricated laminating layer is approximately equal to a thickness of the semiconductor die across an entire width of the semiconductor device after laminating.

2. The method of claim 1, further including providing the reinforced insulating film to include glass cloth, glass fiber, or glass fillers.

3. The method of claim 1, further including laminating the prefabricated laminating layer over the reinforced insulating film with the semiconductor die extending completely through the prefabricated laminating layer.

4. The method of claim 1, further including disposing an insulating layer on the semiconductor die and prefabricated laminating layer.

5. The method of claim 4, further including removing a portion of the insulating layer using laser direct ablation (LDA) to expose a portion of the semiconductor die through the insulating layer.

6. The method of claim 1, wherein the conductive layer is a copper foil.

7. A method of making a semiconductor device, comprising:

providing a semiconductor die including an active surface;

disposing the semiconductor die directly on a reinforced insulating film with the active surface of the semiconductor die oriented away from the reinforced insulating film;

disposing a prefabricated insulating film extending completely over the semiconductor die opposite the reinforced insulating film; and

laminating the prefabricated insulating film over the reinforced insulating film to embed the semiconductor die in the prefabricated insulating film with a thickness of the prefabricated insulating film approximately equal to a thickness of the semiconductor die across an entire width of the prefabricated insulating film after laminating.

8. The method of claim 7, wherein laminating the prefabricated insulating film over the reinforced insulating film includes providing a vacuum hot press over the semiconductor die.

9. The method of claim 7, further including laminating the prefabricated laminating layer over the reinforced insulating film with the semiconductor die extending completely through the prefabricated laminating layer.

10. The method of claim 7, further including:

disposing a conductive layer over the reinforced insulating film; and

disposing the semiconductor die over the reinforced insulating film opposite the conductive layer.

11. The method of claim 10, wherein the conductive layer is a copper foil.

12. The method of claim 7, wherein laminating the prefabricated insulating film over the reinforced insulating film exposes the semiconductor die from the prefabricated insulating film opposite the reinforced insulating film.

13. The method of claim 12, wherein a surface of the prefabricated insulating film is coplanar with an active surface of the semiconductor die.

14. A method of making a semiconductor device, comprising:

providing a reinforced insulating film;

disposing a semiconductor die on the reinforced insulating film;

disposing a prefabricated insulating film over the semiconductor die and reinforced insulating film; and

laminating the prefabricated insulating film to the reinforced insulating film to embed the semiconductor die within the prefabricated insulating film, wherein an active surface of the semiconductor die is coplanar with a first surface of the prefabricated insulating film opposite the reinforced insulating film.

15. The method of claim 14, wherein laminating the prefabricated insulating film over the semiconductor die includes providing a vacuum hot press over the semiconductor die.

16. The method of claim 14, further including forming an interconnect structure over the semiconductor die.

17. The method of claim 14, further including forming an under bump metallization layer over the semiconductor die.

18. The method of claim 14, further including forming a redistribution layer over the semiconductor die and prefabricated insulating film.

19. The method of claim 14, wherein, after laminating, a thickness of the prefabricated insulating film is approximately equal to a thickness of the semiconductor die across an entire width of the prefabricated insulating film.

20. The method of claim 14, further including disposing the prefabricated insulating film to extend completely over the semiconductor die.

21. The method of claim 14, wherein a second surface of the semiconductor die opposite the active surface is coplanar with a second surface of the prefabricated insulating film after laminating.

22. The method of claim 21, wherein the second surface of the semiconductor die and second surface of the prefabricated insulating film contact the reinforced insulating film.

23. The method of claim 21, further including singulating the semiconductor device through the first surface of the prefabricated insulating film and the second surface of the prefabricated insulating film.

24. The method of claim 14, further including:

depositing an insulating layer onto the semiconductor die and prefabricated insulating film; and

forming an opening through the insulating layer to expose the active surface of the semiconductor die.