Semiconductor structure with varying doping profile and related ICS and devices

• US 9,627,472 B2
• Filed: 08/12/2015
• Issued: 04/18/2017
• Est. Priority Date: 09/01/2009
• Status: Active Grant

• Current Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Inventors: Saggio, Mario Giuseppe, Murabito, Domenico, Magri', Angelo
• Primary Examiner(s): Pizarro, Marcos D
• Application Number:
  US14/824,813
• Publication Number:
  US 20150349052A1
• Time in Patent Office: 615 Days
• Field of Search: 257329
• CPC Class Codes: H01L 27/088 the components being field-effect transistors with insulated gate
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/0649 Dielectric regions, e.g. SiO2 regions, air gaps
• CPC Class Codes: H01L 29/086 Impurity concentration or distribution
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/66712 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7395 Vertical transistors, e.g. vertical IGBT
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402

Abstract

An embodiment of a structure for a high voltage device of the type which comprises at least a semiconductor substrate being covered by an epitaxial layer of a first type of conductivity, wherein a plurality of column structures are realized, which column structures comprises high aspect ratio deep trenches, said epitaxial layer being in turn covered by an active surface area wherein said high voltage device is realized, each of the column structures comprising at least an external portion being in turn realized by a silicon epitaxial layer of a second type of conductivity, opposed than said first type of conductivity and having a dopant charge which counterbalances the dopant charge being in said epitaxial layer outside said column structures, as well as a dielectric filling portion which is realized inside said external portion in order to completely fill said deep trench.

Claims

1. An integrated circuit (IC) comprising:

a substrate; and

a plurality of transistors in said substrate, each transistor comprising

a source region of a first conductivity type,

a gate region adjacent said source region,

a semiconductor layer of the first conductivity type and having a plurality of trenches extending therein, said semiconductor layer defining a drain region,

a first epitaxial semiconductor layer of a second conductivity type lining said plurality of trenches,

a first insulator layer in said first epitaxial semiconductor layer, and

a first body region of the second conductivity type extending from the gate region to said first insulator layer so that said first epitaxial semiconductor layer is spaced apart from said source region,

said first epitaxial semiconductor layer having a varying doping profile between the semiconductor layer and said first insulator layer, the varying doping profile having a peak dopant concentration opposite said first insulator layer.

2. The IC of claim 1 wherein the semiconductor layer comprises an epitaxial layer.

3. The IC of claim 1 wherein the first conductivity type comprises N-type conductivity.

4. The IC of claim 1 wherein the second conductivity type comprises P-type conductivity type.

5. The IC of claim 1 wherein the first insulator layer comprises an oxide.

6. The IC of claim 1 wherein said gate region comprises:

a gate insulator layer over the first body region; and

a gate contact layer over the gate insulator layer.

7. The IC of claim 1 further comprising:

a body extension region of the second conductivity type in the first epitaxial semiconductor layer adjacent to the first body region; and

wherein said gate region comprises;

a gate insulator layer over the first body region; and

a gate contact layer over the gate insulator layer.

8. An electronic device comprising:

a plurality of integrated circuits (ICs), at least one IC comprising;

a substrate; and

a plurality of transistors in said substrate, each transistor comprising

a source region of a first conductivity type,

a gate region adjacent said source region,

a semiconductor layer of the first conductivity type and having a plurality of trenches extending therein, said semiconductor layer defining a drain region,

a first epitaxial semiconductor layer of a second conductivity type lining said plurality of trenches,

a first insulator layer in said first epitaxial semiconductor layer, and

a first body region of the second conductivity type extending from the gate region to said first insulator layer so that said first epitaxial semiconductor layer is spaced apart from said source region,

said first epitaxial semiconductor layer having a varying doping profile between the semiconductor layer and said first insulator layer, the varying doping profile having a peak dopant concentration opposite said first insulator layer.

9. The electronic device of claim 8 wherein the semiconductor layer comprises an epitaxial layer.

10. The electronic device of claim 8 wherein the first conductivity type comprises N-type conductivity.

11. The electronic device of claim 8 wherein the second conductivity type comprises P-type conductivity type.

12. The electronic device of claim 8 wherein the first insulator layer comprises an oxide.

13. The electronic device of claim 8 wherein said gate region comprises:

a gate insulator layer over the first body region; and

a gate contact layer over the gate insulator layer.

14. The electronic device of claim 8 further comprising:

a body extension region of the second conductivity type in the first epitaxial semiconductor layer adjacent to the first body region; and

wherein said gate region comprises;

a gate insulator layer over the first body region; and

a gate contact layer over the gate insulator layer.

15. A semiconductor structure comprising:

a source region of a first conductivity type;

a gate region adjacent said source region;

a semiconductor layer of the first conductivity type and having a plurality of trenches extending therein, said semiconductor layer defining a drain region;

a first epitaxial semiconductor layer of a second conductivity type lining said plurality of trenches;

a first insulator layer in said first epitaxial semiconductor layer; and

a first body region of the second conductivity type extending from the gate region to said first insulator layer so that said first epitaxial semiconductor layer is spaced apart from said source region;

said first epitaxial semiconductor layer having a varying doping profile between the semiconductor layer and said first insulator layer, the varying doping profile having a peak dopant concentration opposite said first insulator layer.

16. The semiconductor structure of claim 15 wherein the semiconductor layer comprises an epitaxial layer.

17. The semiconductor structure of claim 15 wherein the first conductivity type comprises N-type conductivity.

18. The semiconductor structure of claim 15 wherein the second conductivity type comprises P-type conductivity type.

19. The semiconductor structure of claim 15 wherein the first insulator layer comprises an oxide.

20. The semiconductor structure of claim 15 wherein said gate region comprises:

a gate insulator layer over the first body region; and

a gate contact layer over the gate insulator layer.

21. The semiconductor structure of claim 15 further comprising:

a body extension region of the second conductivity type in the first epitaxial semiconductor layer adjacent to the first body region; and

wherein said gate region comprises;

a gate insulator layer over the first body region; and

a gate contact layer over the gate insulator layer.

22. The semiconductor structure of claim 15 wherein said gate region comprises a gate insulator layer over the first body region, and a gate contact layer over the gate insulator layer;

and further comprising;

a body-extension region of the second conductivity type in the first epitaxial semiconductor layer adjacent to the first body region; and

a source contact region adjacent to the body-extension and source regions.

23. The semiconductor structure of claim 15 wherein the semiconductor layer has a doping concentration between 5×

10¹⁴ and 5×

10¹⁶ atoms/cm³; and

wherein the first epitaxial semiconductor layer has a doping concentration between 1×

10¹⁵ and 1×

10¹⁷ atoms/cm³.

24. The semiconductor structure of claim 15 wherein the semiconductor layer comprises an upper surface;

and wherein the first epitaxial semiconductor layer extends a vertical distance from the upper surface, the vertical distance being between 10 and 70 μ

m.

25. The semiconductor structure of claim 15 wherein each trench has a width between 1.5 and 4 μ

m.

26. The semiconductor structure of claim 15 further comprising:

a first gate insulator layer over the first body region;

a first gate contact layer over the first gate insulator layer;

a second body region of the second conductivity type in the semiconductor layer adjacent to the first epitaxial semiconductor layer;

a second gate insulator layer over the second body region; and

a second gate contact layer over the second gate insulator layer.

27. The semiconductor structure of claim 15 further comprising:

a first body-extension region of the second conductivity type in the first epitaxial semiconductor layer adjacent to the first body region;

a first gate insulator layer over the first body region;

a first gate contact layer over the first gate insulator layer;

a second body region of the second conductivity type in the semiconductor layer adjacent to the first epitaxial semiconductor layer;

a second body-extension region of the second conductivity type in the first epitaxial semiconductor layer adjacent to the second body region;

a second gate insulator layer over the second body region; and

a second gate contact layer over the second gate insulator layer.

28. The semiconductor structure of claim 15 further comprising a doping transition region between the semiconductor layer and the first epitaxial semiconductor layer.

29. The semiconductor structure of claim 15 further comprising:

a second epitaxial semiconductor layer extending into the semiconductor layer and of the second conductivity type; and

a second insulator layer extending into the second epitaxial semiconductor layer.

30. The semiconductor structure of claim 29 further comprising:

a first gate insulator layer over the first body region;

a first gate contact layer over the gate insulator layer;

a second body region of the second conductivity type in the semiconductor layer adjacent to the second epitaxial semiconductor layer;

a second gate insulator layer over the second body region; and

a second gate contact layer over the second gate insulator layer.

31. The semiconductor structure of claim 29 wherein the first and second epitaxial semiconductor layers are spaced apart by 2 to 8 μ

m.

32. The semiconductor structure of claim 29 wherein the first and second insulator layers are spaced apart by 2.5 to 12 μ

m.