Method of manufacturing semiconductor device

• US 9,627,506 B2
• Filed: 03/18/2016
• Issued: 04/18/2017
• Est. Priority Date: 04/12/2013
• Status: Active Grant

• Current Assignee: Sumitomo Electric Device Innovations Incorporated (Sumitomo Corporation)
• Original Assignee: Sumitomo Electric Device Innovations Incorporated (Sumitomo Corporation)
• Inventors: Nishi, Masahiro
• Primary Examiner(s): WHALEN, DANIEL B
• Application Number:
  US15/074,014
• Publication Number:
  US 20160260818A1
• Time in Patent Office: 396 Days
• Field of Search: None
• CPC Class Codes: H01L 21/28587 characterised by the sectional shape, e.g. T, inverted T
• CPC Class Codes: H01L 21/3065 Plasma etching; Reactive-ion etching
• CPC Class Codes: H01L 21/3081 characterised by their composition, e.g. multilayer masks, materials
• CPC Class Codes: H01L 21/3083 characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/205 in different semiconductor regions , e.g. heterojunctions
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/66462 with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
• CPC Class Codes: H01L 29/7787 with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET

Abstract

A semiconductor device includes a semiconductor layer formed on a substrate, an electrode contact window that includes a recess formed on a surface of the semiconductor layer, an inner wall having a slope, and a source electrode, a drain electrode, and a gate electrode formed on the semiconductor layer, in which the drain electrode is in contact with the slope of the inner wall.

Claims

1. A method of manufacturing a semiconductor device, the method comprising:

forming a semiconductor layer on a substrate;

forming a first resist on the semiconductor layer;

forming a second resist on the first resist;

forming a first opening pattern of the first resist and a second opening pattern of the second resist, the first opening pattern and the second opening pattern being overlapped with each other;

performing isotropic etching on the semiconductor layer through the first opening pattern and the second opening pattern so as to form a recess on a surface of the semiconductor layer, the recess having a slanted slope; and

forming an electrode on the recess of the semiconductor layer which is exposed from the first opening pattern and the second opening pattern.

2. The method according to claim 1,

wherein the semiconductor layer is formed by an electron transit layer on the substrate, an electron supply layer on the electron transit layer, and a cap layer on the electron supply layer, and

wherein a bottom of the recess is formed at a surface of the electron supply layer.

3. The method according to claim 2,

wherein the electron transit layer includes GaN, the electron supply layer includes AlGaN or InAlN, and the cap layer includes GaN.

4. The method according to claim 2,

wherein the electrode is formed so as to be in contact with the bottom and the slanted slope of the recess in the forming of the electrode.

5. The method according to claim 1,

wherein the electrode is a source electrode or a drain electrode.

6. The method according to claim 1,

wherein a size of the first opening is greater than that of the second opening.

7. The method according to claim 1,

wherein the performing of the isotropic etching is conducted after performing anisotropic etching on the semiconductor layer through the first opening pattern and the second opening pattern.

8. The method according to claim 7,

wherein any of Cl₂, BCl₃, and SiCl₄ is used for the isotropic etching and the anisotropic etching.

9. The method according to claim 7,

wherein the isotropic etching is wet etching, and

wherein potassium hydroxide or sodium hydroxide is used for the wet etching.