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Camera configuration in a camera system accelerator architecture

  • US 9,628,704 B2
  • Filed: 02/20/2016
  • Issued: 04/18/2017
  • Est. Priority Date: 10/01/2013
  • Status: Expired due to Fees
First Claim
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1. A camera system, comprising:

  • an image sensor chip configured to produce image data representative of light incident upon the image sensor chip during a capture interval;

    an image capture accelerator chip (“

    ICA”

    ) comprising;

    an input configured to receive the image data from the image sensor;

    a compression engine configured to decimate the received image data into a plurality of image sub-band components; and

    one or more outputs configured to output the received image data and an image sub-band component; and

    an image signal processor chip (“

    ISP”

    ) with a first input and a second input, the ICA coupled between the image sensor chip and the ISP and configured to;

    receive the processed image data at the first input;

    receive the image sub-band component at the second input;

    process the received sub-band component; and

    reconfigure the camera system based on the processing of the received sub-band component.

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