Directed event signaling for multiprocessor systems

• US 9,632,569 B2
• Filed: 08/05/2014
• Issued: 04/25/2017
• Est. Priority Date: 08/05/2014
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Suarez Gracia, Dario, Zhao, Han, Montesinos Ortego, Pablo, Cascaval, Gheorghe Calin, Xenidis, James
• Primary Examiner(s): Partridge, William B
• Application Number:
  US14/451,628
• Publication Number:
  US 20160041852A1
• Time in Patent Office: 994 Days
• Field of Search: None
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: G06F 9/4856 resumption being on a different machine, e.g. task migration, virtual machine migration G06F9/5088 takes precedence
• CPC Class Codes: G06F 9/4893 taking into account power or heat criteria power management in computers in general G06F1/3203; thermal management in computers in general G06F1/206
• CPC Class Codes: G06F 9/526 Mutual exclusion algorithms
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Multi-processor computing device methods manage resource accesses by a signaling event manager signaling processor elements requesting access to a resource to wake up to access the resource when the resource is available or wait for an event when the resource is busy. Processor elements may enter a sleep state while awaiting access to the requested resource. When multiple elements are waiting for the resource, the processor element with a highest assigned priority is signaled to wake up when the resource is available without waking other elements. Priorities may be assigned to processor elements waiting for the resource based on a heuristic or parameter that may depend on a state of the computing device or the processor elements. A sleep duration may be estimated for a processor element waiting for a resource and the processor element may be removed from a scheduling queue or assigned another thread during the sleep duration.

Claims

1. A method for managing processor elements contending for one or more common resources on a computing device having a plurality of processor elements, comprising:

determining a parameter for use in assigning priorities to the plurality of processor elements requesting access to a resource based on an operating state of the computing device;

assigning a priority to a processor element for requesting access to the resource, wherein the priority is assigned based on the parameter for the processing element;

signaling the processor element requesting access to the resource to wait for the resource to become available in response to determining that the resource is not available; and

signaling the processor element to access the resource in response to determining that the resource is available and that the processor element is assigned a highest priority for requesting access to the resource.

2. The method of claim 1, further comprising:

receiving a signal indicating availability of the resource; and

identifying one of the plurality of processor elements that is assigned the highest priority for accessing the resource in response to the signal indicating availability of the resource.

3. The method of claim 1, wherein:

signaling the processor element requesting access to the resource to wait for the resource to become available in response to determining that the resource is not available comprises triggering the processor element to enter a sleep state; and

signaling the processor element to access the resource comprises signaling the processor element to wake up.

4. A computing device , comprising:

a plurality of processor elements; and

a signaling event manager communicatively connected to the plurality of processor elements and configured with signaling event manager-executable instructions to perform operations comprising;

determining a parameter for use in assigning priorities to the plurality of processor elements requesting access to a resource based on an operating state of the computing device;

assigning a priority to a processor element for requesting access to the resource, wherein the priority is assigned based on the parameter for the processing element;

signaling the processor element requesting access to the resource to wait for the resource to become available in response to determining that the resource is not available; and

signaling the processor element to access the resource in response to determining that the resource is available and that the processor element is assigned a highest priority for requesting access to the resource.

5. The computing device of claim 4, wherein the signaling event manager is further configured with signaling event manager-executable instructions to perform operations further comprising:

receiving a signal indicating availability of the resource; and

identifying one of the plurality of processor elements that is assigned the highest priority for accessing the resource in response to the signal indicating availability of the resource.

6. The computing device of claim 4, wherein the signaling event manager is further configured with signaling event manager-executable instructions to perform operations such that:

signaling the processor element requesting access to the resource to wait for the resource to become available in response to determining that the resource is not available comprises triggering the processor element to enter a sleep state; and

signaling the processor element to access the resource comprises signaling the processor element to wake up.

7. A non-transitory processor-readable medium having stored thereon processor-executable software instructions to cause a processor of a computing device having a plurality of processing elements to perform operations comprising:

determining a parameter for use in assigning priorities to the plurality of processor elements requesting access to a resource based on an operating state of the computing device;

assigning a priority to a processor element for requesting access to the resource, wherein the priority is assigned based on the parameter for the processing element;

signaling the processor element requesting access to the resource to wait for the resource to become available in response to determining that the resource is not available; and

signaling the processor element to access the resource in response to determining that the resource is available and that the processor element is assigned a highest priority for requesting access to the resource.

8. The non-transitory processor-readable medium of claim 7, wherein the stored processor-executable software instructions are configured to cause the processor to perform operations further comprising:

receiving a signal indicating availability of the resource; and

identifying one of the plurality of processor elements that is assigned the highest priority for accessing the resource in response to the signal indicating availability of the resource.

9. The non-transitory processor-readable medium of claim 7, wherein the stored processor-executable software instructions are configured to cause the processor to perform operations such that:

signaling the processor element requesting access to the resource to wait for the resource to become available in response to determining that the resource is not available comprises triggering the processor element to enter a sleep state; and

signaling the processor element to access the resource comprises signaling the processor element to wake up.

10. A computing device having a plurality of processor elements, comprising:

means for determining a parameter for use in assigning priorities to the plurality of processor elements requesting access to a resource based on an operating state of the computing device;

means for assigning a priority to a processor element for requesting access to the resource, wherein the priority is assigned based on the parameter for the processing element;

means for signaling the processor element requesting access to the resource to wait for the resource to become available in response to determining that the resource is not available; and

means for signaling the processor element to access the resource in response to determining that the resource is available and that the processor element is assigned a highest priority for requesting access to the resource.

11. The computing device of claim 10, further comprising:

means for receiving a signal indicating availability of the resource; and

means for identifying one of the plurality of processor elements that is assigned the highest priority for accessing the resource in response to the signal indicating availability of the resource.

12. The computing device of claim 10, wherein:

means for signaling the processor element requesting access to the resource to wait for the resource to become available in response to determining that the resource is not available comprises means for triggering the processor element to enter a sleep state; and

means for signaling the processor element to access the resource comprises means for signaling the processor element to wake up.