Collecting memory operand access characteristics during transactional execution

• US 9,632,819 B2
• Filed: 08/20/2015
• Issued: 04/25/2017
• Est. Priority Date: 06/30/2014
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Greiner, Dan F., Gschwind, Michael Karl, Salapura, Valentina, Slegel, Timothy J.
• Primary Examiner(s): Choe, Yong
• Application Number:
  US14/830,832
• Publication Number:
  US 20150378922A1
• Time in Patent Office: 614 Days
• CPC Class Codes: G06F 12/0811 with multilevel cache hierarchies
• CPC Class Codes: G06F 12/084 with a shared cache
• CPC Class Codes: G06F 12/0842 for multiprocessing or multitasking
• CPC Class Codes: G06F 12/0875 with dedicated cache, e.g. instruction or stack
• CPC Class Codes: G06F 2212/1016 Performance improvement
• CPC Class Codes: G06F 2212/1041 Resource optimization
• CPC Class Codes: G06F 2212/281 Single cache
• CPC Class Codes: G06F 2212/452 Instruction code
• CPC Class Codes: G06F 2212/62 Details of cache specific to multiprocessor cache arrangements
• CPC Class Codes: G06F 9/467 Transactional memory G06F9/528 takes precedence

Abstract

A transactional execution of a set of instructions in a transaction of a program may be initiated to collect memory operand access characteristics of a set of instructions of a transaction during the transactional execution. The memory operand access characteristics may be stored upon a termination of the transactional execution of the set of instructions. The memory operand access characteristics may include an address of an accessed storage location, a count of a number of times the storage location is accessed, a purpose value indicating whether the storage location is accessed for a fetch, store, or update operation, a count of a number of times the storage location is accessed for one or more of a fetch, store, or update operation; a translation mode in which the storage location is accessed; and an addressing mode.

Claims

1. A computer implemented method for collecting memory operand access characteristics during transactional execution (TX) of a transaction, the method comprising:

initiating, by a processor, a transactional execution of a set of instructions in a transaction of a program;

collecting, by the processor, memory operand access characteristics of the set of instructions during the transactional execution;

storing, by the processor, the memory operand access characteristics upon a termination of the transactional execution of the set of instructions; and

wherein the initiating is performed by execution of a TBEGIN instruction in the program, by the processor, the TBEGIN instruction specifying a parameter, the parameter designating a storage location for the storing of the memory operand access characteristics.

2. The method of claim 1, wherein the termination of the transactional execution is caused by any one of execution of a terminating instruction and aborting the transactional execution.

3. The method of claim 1, wherein the storing further comprises saving the collected memory operand access characteristics in a list of objects.

4. The method of claim 3, wherein a maximum size of the list of objects is fixed, or is determined by the program.

5. The method of claim 3, wherein the list comprises one or more entries corresponding to any one or more of:

an address of a storage location of an operand accessed by a transactional instruction;

a count of a number of times a storage location of an operand is accessed by a transactional instruction;

a purpose value indicating whether the storage location of an operand, accessed by a transactional instruction, is accessed for a fetch, store, or update operation;

a count of a number of times a storage location of an operand is accessed by a transactional instruction;

a translation mode of an operand accessed by a transactional instruction; and

an addressing mode of an operand accessed by a transactional instruction.