Systems and methods for controlling inverters

• US 9,634,579 B2
• Filed: 04/03/2015
• Issued: 04/25/2017
• Est. Priority Date: 04/03/2015
• Status: Active Grant

• Current Assignee: Hamilton Sundstrand Corporation (Rtx Corporation)
• Original Assignee: Hamilton Sundstrand Corporation (Rtx Corporation)
• Inventors: White, Adam M.
• Primary Examiner(s): Dole, Timothy J
• Assistant Examiner(s): AHMED, YUSEF A
• Application Number:
  US14/678,334
• Publication Number:
  US 20160294303A1
• Time in Patent Office: 753 Days
• CPC Class Codes: H02M 1/0025 Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
• CPC Class Codes: H02M 1/123 Suppression of common mode voltage or current
• CPC Class Codes: H02M 7/4833 Capacitor voltage balancing
• CPC Class Codes: H02M 7/487 Neutral point clamped inverters
• CPC Class Codes: H02M 7/537 using semiconductor devices only, e.g. single switched pulse inverters

Abstract

A method of controlling an inverter includes receiving a target waveform for output voltage of an inverter phase, calculating a phase bias for an inverter phase using the target waveform, biasing the target waveform using the phase bias, and generating a switching device command signal by comparing the biased target waveform to a carrier waveform. The switching device command signal has a switching patter that reduces midpoint current in an inverter input lead and common mode voltage in an inverter output lead.

Claims

1. A method of controlling an inverter, comprising:

receiving a target waveform for output voltage of an inverter phase;

calculating a phase bias for an inverter phase using the target waveform;

biasing the target waveform using the phase bias; and

generating a switching device command signal by comparing the biased target waveform to a carrier waveform, wherein the switching device command signal reduces midpoint current in an inverter input lead and common mode voltage in an inverter output lead,

wherein calculating the phase bias further comprises comparing an uncompensated midpoint duty cycle to a target midpoint duty cycle for a phase of the inverter, and

wherein the uncompensated midpoint duty cycle for a phase of the inverter is calculated by consolidating output of low and high saturation blocks using the target waveform.

2. The method as recited in claim 1, wherein the target waveform includes an A-phase target waveform, wherein the method further includes receiving B-phase and C-phase target waveforms.

3. The method as recited in claim 1, wherein the phase bias includes an A-phase bias, wherein the method further includes calculating a B-phase bias and a C-phase bias.

4. The method as recited in claim 1, wherein biasing the target waveform further comprises generating first and second reference signals using the target waveform.

5. The method as recited in claim 4, further including:

adding the phase bias to the first reference signal; and

subtracting the phase from the second reference signal.

6. The method as recited in claim 4, wherein the switching device command signal is an upper switch command signal, and further including:

generating the upper switch command signal by comparing a first switching command signal to a first carrier wave; and

generating an intermediate lower switch command signal using an inverse of the output of the first switching command signal and first carrier wave comparison.

7. The method as recited in claim 6, further including:

generating an intermediate upper switch command signal by comparing a second switching command signal to a second carrier wave; and

generating a lower switch command signal using an inverse of the output of the second switching command signal and second carrier wave comparison.

8. A method of controlling an inverter, comprising:

receiving a target waveform for output voltage of an inverter phase;

calculating a phase bias for an inverter phase using the target waveform;

biasing the target waveform using the phase bias; and

generating a switching device command signal by comparing the biased target waveform to a carrier waveform, wherein the switching device command signal reduces midpoint current in an inverter input lead and common mode voltage in an inverter output lead,

wherein calculating the phase bias further comprises comparing an uncompensated midpoint duty cycle to a target midpoint duty cycle for a phase of the inverter, and

wherein the target midpoint duty cycle is calculated by inverting and biasing a maximum of the absolute value of the plurality of target waveforms.

9. A control system for an inverter, comprising:

a processor; and

a memory communicative with the processor, wherein the processor has instructions recorded thereon that, when read by the processor, cause the processor to;

receive a target waveform representative of output voltage of an inverter phase;

calculate a phase bias for an inverter phase using the target waveform;

bias the target waveform using the phase bias; and

generate a switching device command signal by comparing the biased target waveform to a carrier waveform, wherein the switching device command signal reduces midpoint current in an inverter input lead and common mode voltage in an inverter output lead,

wherein the phase bias is calculated by comparing an uncompensated midpoint duty cycle to a target midpoint duty cycle for a phase of the inverter, and

wherein the uncompensated midpoint duty cycle for a phase of the inverter is calculated by consolidating output of low and high saturation blocks using the target waveform.

10. The control system as recited in claim 9, wherein the instructions further cause the processor to bias the target waveform by generating first and second reference signals using the target waveform.

11. The control system as recited in claim 10, wherein the instructions further cause the processor to add the phase bias to the first reference signal and subtract the phase bias from the second reference signal.

12. A control system for an inverter, comprising:

a processor; and

a memory communicative with the processor, wherein the processor has instructions recorded thereon that, when read by the processor, cause the processor to;

receive a target waveform representative of output voltage of an inverter phase;

calculate a phase bias for an inverter phase using the target waveform;

bias the target waveform using the phase bias; and

generate a switching device command signal by comparing the biased target waveform to a carrier waveform, wherein the switching device command signal reduces midpoint current in an inverter input lead and common mode voltage in an inverter output lead,

wherein the phase bias is calculated by comparing an uncompensated midpoint duty cycle to a target midpoint duty cycle for a phase of the inverter, and

wherein the target midpoint duty cycle is calculated by inverting and biasing a maximum of the absolute value of the plurality of target waveforms.