Wafer alignment mark scheme

• US 9,640,487 B2
• Filed: 04/16/2015
• Issued: 05/02/2017
• Est. Priority Date: 03/28/2012
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Tseng, Wei-Hsiang, Wang, Chao-Hsiung, Lin, Chin-Hsiang, Liu, Heng-Hsin, Peng, Jui-Chun, Chen, Ho-Ping
• Primary Examiner(s): Chowdhury, Tarifur
• Assistant Examiner(s): Ahmed, Jamil
• Application Number:
  US14/688,766
• Publication Number:
  US 20150219448A1
• Time in Patent Office: 747 Days
• CPC Class Codes: G03F 9/7011 Pre-exposure scan; original with original holder alignment; Prealignment, i.e. workpiece with workpiece holder
• CPC Class Codes: G03F 9/7084 Position of mark on substrate, i.e. position in (x, y, z) of mark, e.g. buried or resist covered mark, mark on rearside, at the substrate edge, in the circuit area, latent image mark, marks in plural levels
• CPC Class Codes: H01L 22/10 Measuring as part of the manufacturing process burn-in G01R31/2855
• CPC Class Codes: H01L 2223/5442 comprising non digital, non alphanumeric information, e.g. symbols
• CPC Class Codes: H01L 2223/54426 for alignment
• CPC Class Codes: H01L 2223/54453 for use prior to dicing
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a first wafer and a second wafer. The light source is configured to provide a first light directed to the first wafer and a second light directed to the second wafer. The light detection device is configured to detect reflected light intensity from the first wafer to find a position of at least one wafer alignment mark of the first wafer and to detect reflected light intensity from the second wafer to find a position of at least one wafer alignment mark of the second wafer.

Claims

1. A wafer alignment apparatus, comprising:

a light source;

a light detection device; and

a rotation device configured to rotate a first wafer and a second wafer,

wherein the light source is disposed between the first wafer and the second wafer and configured to provide a first light directed to the first wafer and a second light directed to the second wafer, wherein the first light is directed in a different direction than the second light, wherein the light detection device is configured to detect a first reflected light intensity from the first wafer to find a position of at least one first wafer alignment mark of a plurality of first wafer alignment marks in a backside surface of the first wafer and to detect a second reflected light intensity from the second wafer to find a position of at least one second wafer alignment mark of a plurality of second wafer alignment marks in a frontside surface of the second wafer, wherein the first reflected light intensity from each first wafer alignment mark of the plurality of first wafer alignment marks is identifiably different, wherein the second reflected light intensity from each second wafer alignment mark of the plurality of second wafer alignment marks is identifiably different, the backside surface of the first wafer facing the frontside surface of the second wafer, the frontside surface of second wafer being configured for integrated circuit structures.

2. The wafer alignment apparatus of claim 1, wherein the first wafer and the second wafer are selectively rotated for a specified angle depending on a number of the at least one wafer alignment mark of the first wafer or the at least one wafer alignment mark of the second wafer.

3. The wafer alignment apparatus of claim 2, wherein the specified angle is given as 360°

divided by the number of the at least one wafer alignment mark of the first wafer or the at least one wafer alignment mark of the second wafer.

4. The wafer alignment apparatus of claim 1, wherein the position of the at least one wafer alignment mark of the first wafer or the at least one wafer alignment mark of the second wafer is found by recognizing a reduced light intensity detected by the light detection device.

5. The wafer alignment apparatus of claim 1, wherein the at least one wafer alignment mark of the first wafer or the at least one wafer alignment mark of the second wafer includes at least one recess and a number of the at least one recess is from one to a number corresponding to a position number associated with the at least one wafer alignment mark of the first wafer or the at least one wafer alignment mark of the second wafer.

6. The wafer alignment apparatus of claim 5, wherein the at least one recess has a depth ranging from 100 nm to 200 nm.

7. The wafer alignment apparatus of claim 1, wherein the at least one wafer alignment mark of the first wafer is one of a plurality of wafer alignment marks of the first wafer, the wafer alignment marks of the plurality of wafer alignment marks of the first wafer are separated by a plurality of angles, and at least two of the angles of the plurality of angles are equal.

8. A method, comprising:

transmitting a first light from a light source at an upward angle to a backside surface of a first wafer and transmitting a second light from the light source at a downward angle to a frontside surface of a second wafer, the first wafer and the second wafer each comprising a backside surface and a frontside surface opposite of the backside surface, the frontside surfaces being configured for integrated circuit structures;

rotating the first wafer and the second wafer;

detecting first reflected light from at least one alignment mark of a plurality of first wafer alignment marks formed on the backside of the first wafer by a light detection device and detecting a second reflected light from at least one alignment mark of a plurality of second wafer alignment marks formed on the frontside of the second wafer by the light detection device, wherein first reflected light from a first alignment mark of the plurality of first wafer alignment marks is identifiably different from first reflected light from a second alignment mark of the plurality of first wafer alignment marks, wherein second reflected light from a first alignment mark of the plurality of second wafer alignment marks is identifiably different from second reflected light from a second alignment mark of the plurality of second wafer alignment marks; and

aligning the first wafer and the second wafer according to the reflected first light and the reflected second light.

9. The method of claim 8, wherein the step of aligning comprises:

selectively rotating the first wafer and the second wafer for a specified angle depending on a number of the at least one wafer alignment mark of the first wafer or the at least one wafer alignment mark of the second wafer; and

finding a position of the at least one wafer alignment mark of the first wafer and a position of the at least one wafer alignment mark of the second wafer.

10. The method of claim 9, wherein the specified angle is given as 360°

divided by the number of the at least one wafer alignment mark of the first wafer or the at least one wafer alignment mark of the second wafer.

11. The method of claim 9, wherein finding the position of the at least one wafer alignment mark of the first wafer or the at least one wafer alignment mark of the second wafer comprises recognizing a reduced light intensity detected by the light detection device.

12. The method of claim 8, wherein the at least one wafer alignment mark of the first wafer or the at least one wafer alignment mark of the second wafer includes at least one recess and a number of the at least one recess is from one to a number corresponding to a position number associated with the at least one wafer alignment mark of the first wafer or the at least one wafer alignment mark of the second wafer.

13. The method of claim 8, wherein the at least one recess has a depth ranging from 100 nm to 200 nm.

14. The method of claim 8, wherein the at least one wafer alignment mark of the first wafer is one of a plurality of wafer alignment marks of the first wafer, the wafer alignment marks of the plurality of wafer alignment marks of the first wafer are separated by a plurality of angles, and at least two of the angles of the plurality of angles are equal.

15. A method, comprising:

transmitting light from a light source to a backside surface of a first wafer and a frontside surface of a second wafer;

detecting, by a light detection device, first reflected light from a plurality of first wafer alignment marks formed on the backside surface of the first wafer, wherein the reflected light from each first wafer alignment mark of the plurality of first wafer alignment marks is identifiably different;

detecting, by the light detection device, second reflected light from a plurality of second wafer alignment marks formed on the frontside surface of the second wafer, wherein the reflected light from each second wafer alignment mark of the plurality of second wafer alignment marks is identifiably different;

selectively rotating the first wafer and the second wafer for a specified angle depending on a number of the first wafer alignment marks in the plurality of first wafer alignment marks and a number of the second wafer alignment marks in the plurality of second wafer alignment marks, respectively; and

finding a position of at least one first wafer alignment mark of the plurality of first wafer alignment marks of the first wafer and a position of at least one second wafer alignment mark of the plurality of second wafer alignment marks of the second wafer.

16. The method of claim 15, wherein the specified angle is given as 360°

divided by the number of the first wafer alignment marks in the plurality of first wafer alignment marks of the first wafer or the number of second wafer alignment marks in the plurality of second wafer alignment marks of the second wafer.

17. The method of claim 15, wherein each first wafer alignment mark of the plurality of first wafer alignment marks of the first wafer or each second wafer alignment mark of the plurality of second wafer alignment marks of the second wafer includes at least one recess, wherein a number of the at least one recess is from one to a number corresponding to a position number associated with each first wafer alignment mark of the plurality of first wafer alignment marks of the first wafer or each second wafer alignment mark of the plurality of second wafer alignment marks of the second wafer.

18. The method of claim 17, wherein the at least one recess has a depth ranging from 100 nm to 200 nm.

19. The method of claim 15, wherein the first wafer alignment marks of the first wafer are separated by a plurality of angles and at least two of the angles of the plurality of angles are equal.

20. The method of claim 15, wherein the first wafer alignment marks of the first wafer are evenly distributed along an edge of the first wafer and the second wafer alignment marks of the second wafer are evenly distributed along an edge of the second wafer.