Active interference cancellation

• US 9,641,205 B1
• Filed: 09/08/2015
• Issued: 05/02/2017
• Est. Priority Date: 09/08/2015
• Status: Expired due to Fees

• Current Assignee: Amazon Technologies, Inc. (Amazon.com, Inc.)
• Original Assignee: Amazon Technologies, Inc. (Amazon.com, Inc.)
• Inventors: Hyun, In Chul, Hsu, Morris, Kim, Cheol Su, Gollakota, Sembhayya
• Primary Examiner(s): Tsvey, Gennadiy
• Application Number:
  US14/848,215
• Time in Patent Office: 602 Days
• CPC Class Codes: H04B 1/0475 with means for limiting noise, interference or distortion H04B1/0483 takes precedence
• CPC Class Codes: H04B 1/406 with more than one transmission mode, e.g. analog and digital modes
• CPC Class Codes: H04B 1/525 with means for reducing leakage of transmitter signal into the receiver
• CPC Class Codes: H04W 84/12 WLAN [Wireless Local Area Networks]
• CPC Class Codes: H04W 88/06 adapted for operation in multiple networks or having at least two operational modes, e.g. multi-mode terminals

Abstract

Antenna structures and methods of operating the same are described. One apparatus includes a processing device that executes an active interference cancellation (AIC) algorithm and radio frequency front-end (RFFE) circuitry coupled to the processing device. The RFFE circuitry includes two RF couplers, and a programmable-delay filter and a vector modulator disposed along electrical path. The AIC algorithm is operable to control the programmable-delay filter to match a delay of the electrical path to a propagation delay in an antenna path. The AIC algorithm is operable to control the vector modulator to adjust a phase, an amplitude or both of a copy of a first RF signal transmitted via the first antenna to generate a second RF signal. The second RF signal is added to a third RF signal via the second RF coupler to remove from the third RF signal interference caused by the first RF signal.

Claims

1. An apparatus comprising:

a processing device; and

radio frequency front-end (RFFE) circuitry coupled to the processing device, the RFFE circuitry comprising

a vector modulator disposed along an electrical path between a transmit path to a first antenna and a receive path from a second antenna, wherein the processing device is operable to match a delay in the electrical path to a propagation delay in an antenna path, wherein the processing device is operable to control the vector modulator to adjust a phase, an amplitude or both of a copy of a first RF signal to generate a third RF signal that is added to a second RF signal received via the second antenna to remove interference caused by the first RF signal transmitted via the first antenna, wherein the processing device is operable to determine a phase and an amplitude for the third RF signal that results in a minimum power by the second RF signal by;

setting a phase resolution to a first value;

determining a first phase of the third RF signal with the phase resolution set to the first value;

setting an amplitude resolution to a second value;

determining a second amplitude of the third RF signal with the amplitude resolution set to the second value;

setting the phase resolution to a third value;

determining the phase of the third RF signal with the phase resolution set to the third value;

setting the amplitude resolution to a fourth value;

determining the amplitude of the third RF signal with the amplitude resolution set to the fourth value;

setting the phase resolution to a fifth value;

determining the phase of the third RF signal with the phase resolution set to the fifth value;

setting the amplitude resolution to a sixth value; and

determining the amplitude of the third RF signal with the amplitude resolution set to the sixth value.

2. The apparatus of claim 1, wherein the RFFE circuitry further comprises:

a programmable-delay filter; and

a balun coupled between the programmable-delay filter and the vector modulator.

3. The apparatus of claim 1, further comprising a first transceiver coupled to the transmit path and a second transceiver coupled to the receive path, wherein the first transceiver and the second transceiver operate in a same frequency spectrum concurrently without time-switching, and wherein the first transceiver and the second transceiver operate concurrently in the 2.4 GHz industrial, scientific and medical (ISM) radio band.

4. The apparatus of claim 1, further comprising a first transceiver coupled to the transmit path and a second transceiver coupled to the receive path, wherein the first transceiver is at least one of a wireless local area network (WLAN) transceiver, a wide area network (WAN) transceiver, or a personal area network (PAN) transceiver, and wherein the second transceiver is at least one of a WLAN transceiver, a WAN transceiver, or a PAN transceiver.

5. The apparatus of claim 1, further comprising a programmable-delay filter, wherein the programmable-delay filter comprises:

a first single pole, N-throw (SPNT) switch, where N is a positive integer greater than one;

a second SPNT switch; and

a plurality of lumped elements disposed in individual delay paths between the first SPNT and the second SPNT, wherein the plurality of lumped elements comprise different values to result in different delays in the individual delay paths.

6. The apparatus of claim 1, wherein the RFFE circuitry further comprises:

a first RF coupler coupled between the first antenna and a first transceiver in the transmit path, the first RF coupler to create a copy of the first RF signal transmitted via the first antenna;

a second RF coupler coupled between the second antenna and a second transceiver in the receive path, the second antenna to receive the second RF signal, the second RF signal comprising interference caused by the first RF signal transmitted via the first antenna;

a programmable-delay filter disposed along the electrical path between the first RF coupler and the second RF coupler;

a third RF coupler coupled between a third antenna and a third transceiver in a second transmit path, the third RF coupler to create a copy of a fourth RF signal transmitted via the third antenna;

a second programmable-delay filter disposed along a second electrical path between the third RF coupler and the second RF coupler, the second RF signal further comprising interference caused by the fourth RF signal transmitted via the third antenna;

a second vector modulator disposed along the second electrical path between the third RF coupler and a two-way combiner, wherein the processing device is operable to control the second vector modulator to adjust a phase, an amplitude or both of the copy of the fourth RF signal to generate a fifth RF signal; and

the two-way combiner coupled to the second vector modulator, the vector modulator, and the second RF coupler, the two-way combiner to combine the fifth RF signal to the third RF signal, and wherein the second RF coupler adds the third RF signal to the second RF signal received via the second antenna, removing the interference caused by the first RF signal transmitted via the first antenna and the interference caused by the fourth RF signal transmitted via the third antenna.

7. The apparatus of claim 6, further comprising a bypass circuit comprising:

a first single pole, double throw (SPDT) switch coupled to the second transceiver; and

a second SPDT switch coupled to the second antenna, wherein a first terminal of the first SPDT switch is coupled to the two-way combiner via the second RF coupler, wherein a first terminal of the second SPDT switch is coupled to the second RF coupler, and wherein a second terminal of the first SPDT switch is coupled to a second terminal of the second SPDT switch.

8. The apparatus of claim 6, wherein the processing device is operable to control the programmable-delay filter to select a phase delay of the copy of the first RF signal and the second programmable-delay filter to select a phase delay of the copy of the fourth RF signal during operation based on an antenna environment of the first antenna, second antenna, and third antenna and to control the vector modulator to adjust the phase, the amplitude or both of the copy of the first RF signal and the second vector modulator adjust the phase, the amplitude or both of the copy of the fourth RF signal.

9. The apparatus of claim 8, wherein the processing device is operable to adjust parameters of the RFFE circuitry to accommodate changes in the antenna environment.

10. A method comprising:

instructing, by a processing device, a first transceiver to transmit a first radio frequency (RF) signal via a first antenna;

instructing, by the processing device, a second transceiver to receive a second RF signal via a second antenna, the second RF signal includes interference from the first RF signal transmitted through an antenna path from the first antenna to the second antenna;

controlling, by the processing device, a first programmable-delay filter, disposed in an electrical path between the first transceiver and the second transceiver, to match a delay in the electrical path to a propagation delay in the antenna path;

determining, by the processing device, an amplitude and a phase for a third RF signal that result in a minimum power by the second RF signal by iteratively determining the phase of the third RF signal using a phase resolution set to a first plurality of values, one value at a time, and by iteratively determining the amplitude of the third RF signal using an amplitude resolution set to a second plurality of values, one value at a time; and

controlling, by the processing device, a first vector modulator, disposed in the electrical path, to generate the third RF signal by adjusting a phase, an amplitude or both of a copy of a first RF signal transmitted via the first antenna such that the third RF signal comprises the amplitude and the phase determined by the processing device, wherein the third RF signal is added to the second RF signal received via the second antenna to remove the interference from the first RF signal.

11. The method of claim 10, further comprising:

selecting, by the processing device, one of a plurality of values for the first programmable-delay filter to set a first delay of the electrical path; and

determining, by the processing device, an amplitude and a phase for the third RF signal that result in a minimum power by the second RF signal.

12. The method of claim 11, wherein determining the amplitude and phase comprises:

setting a first amplitude value and a first phase value;

generating the third RF signal having the first amplitude value and the first phase value;

measuring a power of the second RF signal; and

adjusting the first amplitude value, the first phase value, or both to find the minimum power by the second RF signal.

13. The method of claim 11, further comprising selecting, by the processing device, one of a plurality of individual delay paths using a first single pole, N-throw (SPNT) switch, wherein N is a positive integer greater than one, and wherein the plurality of individual delay paths comprises lumped elements with different values that result in different delays in the plurality of individual delay paths.

14. The method of claim 10, further comprising:

instructing, by the processing device, a third transceiver to transmit a fourth RF signal via a third antenna;

controlling, by the processing device, a second programmable-delay filter, disposed in a second electrical path between the third transceiver and the second transceiver, to match a delay of the second electrical path to a second propagation delay of a second antenna path between the third antenna and the second antenna; and

controlling, by the processing device, a second vector modulator, disposed in the second electrical path, to generate a fifth RF signal by adjusting a phase, an amplitude or both of a copy of the fourth RF signal transmitted via the third antenna, wherein the third RF signal and the fifth RF signal are combined by a two-way combiner and added to the second RF signal received via the second antenna to remove from the second RF signal interference caused by the first RF signal and fourth RF signal.

15. A method comprising:

instructing, by a processing device, a first transceiver to transmit a first radio frequency (RF) signal via a first antenna;

instructing, by the processing device, a second transceiver to receive a second RF signal via a second antenna, the second RF signal includes interference from the first RF signal transmitted through an antenna path from the first antenna to the second antenna;

matching, by the processing device, a delay in an electrical path between the first transceiver and the second transceiver to a propagation delay in the antenna path;

controlling, by the processing device, a first vector modulator, disposed in the electrical path, to generate a third RF signal by adjusting a phase, an amplitude or both of a copy of a first RF signal transmitted via the first antenna, wherein the third RF signal is added to the second RF signal received via the second antenna to remove the interference from the first RF signal; and

determining, by the processing device, an amplitude and a phase for the third RF signal that result in a minimum power by the second RF signal, wherein the determining the amplitude and the phase comprises;

setting a phase resolution to a first value;

determining a phase of the third RF signal with the phase resolution set to the first value;

setting an amplitude resolution to a second value;

determining an amplitude of the third RF signal with the amplitude resolution set to the second value;

setting the phase resolution to a third value;

determining the phase of the third RF signal with the phase resolution set to the third value;

setting the amplitude resolution to a fourth value;

determining the amplitude of the third RF signal with the amplitude resolution set to the fourth value;

setting the phase resolution to a fifth value;

determining the phase of the third RF signal with the phase resolution set to the fifth value;

setting the amplitude resolution to a sixth value; and

determining the amplitude of the third RF signal with the amplitude resolution set to the sixth value.

16. The method of claim 15, further comprising:

selecting, by the processing device, a first value of a plurality of values for a first programmable-delay filter to set a first delay of the electrical path;

selecting, by the processing device, a second value of the plurality of values for the first programmable-delay filter to set a second delay of the electrical path;

searching, by the processing device, for the amplitude and the phase for the third RF signal that results in the minimum power by the second RF signal; and

selecting, by the processing device, the first value or the second value for the first programmable-delay filter that sets a delay that is a closest match to the propagation delay of the antenna path.