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Method and apparatus implemented in processors for real-time scheduling and task organization based on response time order of magnitude

  • US 9,645,853 B2
  • Filed: 07/12/2016
  • Issued: 05/09/2017
  • Est. Priority Date: 10/04/2012
  • Status: Active Grant
First Claim
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1. A method of a responsive hardware device implemented in a processor having one or more logical cores for programming a major task, comprising:

  • receiving the major task, wherein the major task has a defined response time requirement requires certain output within a certain time after the arrival of the last of certain input necessary to generate the output;

    subdividing the major task into one first task and one or more second tasks, the first task having a higher priority than the one or more second tasks, the first task having an associated first response time requirement, each second task defining a second output and having an associated second response time requirement, so that the outputs of the major task are produced within the defined response time requirement of the major task;

    the first task receiving data and timing input from one or more hardware sources to build a foundational state of each of the one or more second tasks and using the data and timing input to create one or more packets with the data and timing for each of the one or more second tasks; and

    each of the one or more second tasks receiving the one or more packets and producing outputs based on the data and timing contained in the received one or more packets and the foundational state received previously by the second task to produce the second output, wherein the data and timing contained in the one or more packets received by the second task, together with the foundational state received previously by the second task, constitutes input as a state to enable the second task to produce the second output within the second response time requirement.

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