Apparatus and method for providing resilience to attacks on reset of the apparatus

• US 9,646,160 B2
• Filed: 09/08/2014
• Issued: 05/09/2017
• Est. Priority Date: 09/08/2014
• Status: Active Grant

• Current Assignee: Arm Ltd. (United Kingdom) (SoftBank Group Corp.)
• Original Assignee: Arm Ltd. (United Kingdom) (SoftBank Group Corp.)
• Inventors: Zonza, Stephane, Brelot, Jean-Baptiste, Rabefarihy, Yohann Fred Arifidy, Fanara, Carlo Dario
• Primary Examiner(s): Mehrmanesh, Amir
• Assistant Examiner(s): Shayanfar, Ali
• Application Number:
  US14/479,688
• Publication Number:
  US 20170061137A1
• Time in Patent Office: 974 Days
• CPC Class Codes: G06F 21/60 Protecting data
• CPC Class Codes: G06F 21/755 with measures against power attack
• CPC Class Codes: G06F 21/81 by operating on the power supply, e.g. enabling or disabling power-on, sleep or resume operations

Abstract

An apparatus and method are provided for enhancing resilience to attacks on reset of the apparatus. The apparatus comprises at least one storage element, and update circuitry that is configured to receive obscuring data, and which is responsive to a reset event to store in each of the at least one storage element a data value that is dependent on the current value of the obscuring data. For each such storage element, this ensures that the data value stored in that storage element is unpredictable following each reset event, thereby preventing the reproducibility of certain steps that would typically be taken by an attacker during an attack on the apparatus.

Claims

1. An apparatus for enhancing resilience to attacks, comprising:

a plurality of storage elements forming a remapping group of storage elements

update circuitry configured to receive obscuring data, and responsive to a reset event to store in each of said at least one storage element a data value that is dependent on a current value of the obscuring data;

modification circuitry configured to modify a value of a control signal dependent on the remapping group of storage elements in order to generate a modified value for the control signal; and

processing circuitry configured to operate in dependence on the modified value of the control signal,

wherein the modification circuitry is configured to use the value of the control signal to identify a storage element within said remapping group, and to output the data value stored in the identified storage element as the modified value of the control signal.

2. An apparatus as claimed in claim 1, further comprising:

obscuring data generation circuitry responsive to a trigger event to generate the current value for the obscuring data.

3. An apparatus as claimed in claim 2, wherein the trigger event is configured to occur at least once for each occurrence of the reset event.

4. An apparatus as claimed in claim 3, wherein said trigger event comprises said reset event.

5. An apparatus as claimed in claim 1, wherein the current value of the obscuring data is specified independently for each storage element.

6. An apparatus as claimed in claim 1, wherein the current value of the obscuring data is shared between the plurality of storage elements, and the update circuitry is responsive to the reset event to store different but correlated data values in each of the plurality of storage elements in dependence on the current value of the obscuring data.

7. An apparatus as claimed in claim 1, wherein the current value of the obscuring data is pseudo random value.

8. An apparatus as claimed in claim 1, wherein, for each of said plurality of storage elements, the update circuitry is responsive to the reset event to perform one of setting that storage element and resetting that storage element, dependent on the current value of the obscuring data.

9. An apparatus as claimed in claim 1, wherein the update circuitry implements an XOR function using the current value of the obscuring data as one input and a predetermined value as another input.

10. An apparatus as claimed in claim 1, wherein each of said plurality of storage elements comprises one of a flip-flop and a latch.

11. An apparatus as claimed in claim 1, wherein:

memory address space for the apparatus is formed of a plurality of memory regions;

the processing circuitry is a memory protection unit having address range registers used to identify an address range for each memory region;

said remapping group of storage elements identify which address range registers are associated with each memory region; and

the control signal comprises a memory region identifier signal.

12. An apparatus as claimed in claim 11, wherein the modification circuitry is configured to use the value of the memory region identifier signal to identify a storage element within said remapping group, and to output the data value stored in the identified storage element as the modified value of the memory region identifier signal.

13. An apparatus as claimed in claim 1 wherein:

the remapping group of storage elements form a renaming table providing a logical address to physical address mapping for registers;

the value of the control signal specifies a logical address for a register; and

the modification circuitry is configured to convert the logical address into a corresponding physical address for the register in dependence on the renaming table, in order to output as the modified value for the control signal the corresponding physical address.

14. An apparatus as claimed in claim 13, wherein the processing circuitry is configured to perform a register access operation in respect of the register identified by the physical address forming the modified value for the control signal.

15. A method of updating within an apparatus a plurality of storage elements forming a remapping group of storage elements in order to enhance resilience to attacks, comprising:

receiving obscuring data;

responsive to a reset event, storing in each of said plurality of storage element a data value that is dependent on a current value of the obscuring data;

modifying a value of a control signal dependent on the remapping group of storage elements in order to generate a modified value for the control signal; and

operating processing circuitry in dependence on the modified value of the control signal;

wherein the modifying step uses the value of the control signal to identify a storage element within said remapping group, and to output the data value stored in the identified storage element as the modified value of the control signal.

16. An apparatus for enhancing resilience to attacks, comprising:

a plurality of storage element means forming a remapping group of storage element mean;

update means for receiving obscuring data, and responsive to a reset event, for storing in each of said plurality of storage element means a data value that is dependent on a current value of the obscuring data;

modification means for modifying a value of a control signal dependent on the remapping group of storage element means in order to generate a modified value for the control signal; and

processing means for operating in dependence on the modified value of the control signal;

wherein the modification means uses the value of the control signal to identify a storage element means within said remapping group, and to output the data value stored in the identified storage element means as the modified value of the control signal.