Semiconductor device

• US 9,647,128 B2
• Filed: 10/02/2014
• Issued: 05/09/2017
• Est. Priority Date: 10/10/2013
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Hosaka, Yasuharu, Obonai, Toshimitsu, Koezuka, Junichi, Shima, Yukinori, Hayakawa, Masahiko, Hamochi, Takashi, Hiraishi, Suzunosuke
• Primary Examiner(s): Lee, Eugene
• Application Number:
  US14/505,004
• Publication Number:
  US 20150102341A1
• Time in Patent Office: 950 Days
• Field of Search: None
• CPC Class Codes: H01L 21/02112 characterised by the material of the layer
• CPC Class Codes: H01L 21/02403 Oxides
• CPC Class Codes: H01L 21/28 Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268 etching for patterning the electrodes H01L21/311, H01L21/3213; multistep manufacturing processes for data storage electrodes H01L29/4011
• CPC Class Codes: H01L 21/477 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/38 - H01L21/449 and H01L21/461 - H01L21/475 take precedence
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

To suppress a change in electrical characteristics and to improve reliability in a semiconductor device using a transistor including an oxide semiconductor. The semiconductor device includes a gate electrode over an insulating surface, an oxide semiconductor film overlapping with the gate electrode, a gate insulating film which is between the gate electrode and the oxide semiconductor film and is in contact with a surface of the oxide semiconductor film, a protective film in contact with an opposite surface of the surface of the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film. In the gate insulating film or the protective film, the amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than the amount of nitrogen oxide released by heat treatment.

Claims

1. A semiconductor device comprising:

an oxide semiconductor layer and a gate electrode overlapping with each other,

a gate insulating layer between the gate electrode and the oxide semiconductor layer, the gate insulating layer being in contact with a first surface of the oxide semiconductor layer;

a protective layer in contact with a second surface of the oxide semiconductor layer, the second surface being on a side opposite to the first surface; and

a pair of electrodes in electrical contact with the oxide semiconductor layer,

wherein the protective layer contains silicon and oxygen,

wherein the protective layer comprises a portion whose spin density measured by electron spin resonance spectroscopy is greater than or equal to 1×

10¹⁷ spins/cm³ and less than 1×

10¹⁸ spins/cm³, and

wherein the protective layer includes a region where an amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than an amount of nitrogen oxide released by the heat treatment.

2. The semiconductor device according to claim 1,

wherein at least one of an amount of gas having a mass-to-charge ratio m/z of 30 released by the heat treatment and an amount of gas having a mass-to-charge ratio m/z of 46 released by the heat treatment is less than or equal to a detection limit in the region, and

wherein the amount of the gas having the mass-to-charge ratio m/z of 17 released by the heat treatment is greater than or equal to 1×

10¹⁸ molecules/cm³ and less than or equal to 5×

10¹⁹ molecules/cm³ in the region.

3. The semiconductor device according to claim 2,

wherein the gas having the mass-to-charge ratio m/z of 30 comprises nitrogen monoxide,

wherein the gas having the mass-to-charge ratio m/z of 46 comprises nitrogen dioxide, and

wherein the gas having the mass-to-charge ratio m/z of 17 comprises ammonia.

4. The semiconductor device according to claim 1, wherein an electron spin resonance spectrum of the portion has a first signal that appears at a g-factor in a range greater than or equal to 2.037 and less than or equal to 2.039, a second signal that appears at a g-factor in a range greater than or equal to 2.001 and less than or equal to 2.003, and a third signal that appears at a g-factor in a range greater than or equal to 1.964 and less than or equal to 1.966.

5. The semiconductor device according to claim 4, wherein a split width of the first signal and the second signal and a split width of the second signal and the third signal measured by electron spin resonance spectroscopy using an X-band are each 5 mT.

6. The semiconductor device according to claim 4, wherein the first signal, the second signal, and the third signal are attributed to nitrogen oxide.

7. The semiconductor device according to claim 6, wherein the nitrogen oxide includes at least one of nitrogen monoxide and nitrogen dioxide.

8. The semiconductor device according to claim 1,

wherein the gate electrode is over an insulating surface, and

wherein the protective layer, the oxide semiconductor layer, and the gate insulating layer are between the insulating surface and the gate electrode.

9. The semiconductor device according to claim 1,

wherein the gate electrode is over an insulating surface, and

wherein the gate electrode and the gate insulating layer are between the insulating surface and the oxide semiconductor layer.

10. A semiconductor device comprising:

an oxide semiconductor layer and a gate electrode overlapping with each other,

a gate insulating layer between the gate electrode and the oxide semiconductor layer, the gate insulating layer being in contact with a first surface of the oxide semiconductor layer;

a protective layer in contact with a second surface of the oxide semiconductor layer, the second surface being on a side opposite to the first surface; and

a pair of electrodes in electrical contact with the oxide semiconductor layer,

wherein the protective layer contains silicon and oxygen,

wherein the protective layer comprises a portion whose spin density measured by electron spin resonance spectroscopy is greater than or equal to 1×

10¹⁷ spins/cm³ and less than 1×

10¹⁸ spins/cm³,

wherein an electron spin resonance spectrum of the portion has a first signal that appears at a g-factor in a range greater than or equal to 2.037 and less than or equal to 2.039, a second signal that appears at a g-factor in a range greater than or equal to 2.001 and less than or equal to 2.003, and a third signal that appears at a g-factor in a range greater than or equal to 1.964 and less than or equal to 1.966, and

wherein the protective layer includes a region where an amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than an amount of gas having a mass-to-charge ratio m/z of 30 released by the heat treatment.

11. The semiconductor device according to claim 10,

wherein the gate electrode is over an insulating surface, and

wherein the protective layer, the oxide semiconductor layer, and the gate insulating layer are between the insulating surface and the gate electrode.

12. The semiconductor device according to claim 10,

wherein the gate electrode is over an insulating surface, and

wherein the gate electrode and the gate insulating layer are between the insulating surface and the oxide semiconductor layer.

13. A semiconductor device comprising:

an oxide semiconductor layer and a gate electrode overlapping with each other,

a gate insulating layer between the gate electrode and the oxide semiconductor layer, the gate insulating layer being in contact with a first surface of the oxide semiconductor layer;

a protective layer in contact with a second surface of the oxide semiconductor layer, the second surface being on a side opposite to the first surface; and

a pair of electrodes in electrical contact with the oxide semiconductor layer,

wherein the protective layer contains silicon and oxygen,

wherein the protective layer comprises a portion whose spin density measured by electron spin resonance spectroscopy is greater than or equal to 1×

10¹⁷ spins/cm³ and less than 1×

10¹⁸ spins/cm³,

wherein an electron spin resonance spectrum of the portion has a first signal that appears at a g-factor in a range greater than or equal to 2.037 and less than or equal to 2.039, a second signal that appears at a g-factor in a range greater than or equal to 2.001 and less than or equal to 2.003, and a third signal that appears at a g-factor in a range greater than or equal to 1.964 and less than or equal to 1.966, and

wherein the protective layer includes a region where an amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than an amount of gas having a mass-to-charge ratio m/z of 46 released by the heat treatment.

14. The semiconductor device according to claim 13,

wherein the gate electrode is over an insulating surface, and

wherein the protective layer, the oxide semiconductor layer, and the gate insulating layer are between the insulating surface and the gate electrode.

15. The semiconductor device according to claim 13,

wherein the gate electrode is over an insulating surface, and

wherein the gate electrode and the gate insulating layer are between the insulating surface and the oxide semiconductor layer.

16. A semiconductor device comprising:

a transistor comprising;

an oxide semiconductor layer and a gate electrode overlapping with each other,

a gate insulating layer between the gate electrode and the oxide semiconductor layer, the gate insulating layer being in contact with a first surface of the oxide semiconductor layer;

a protective layer in contact with a second surface of the oxide semiconductor layer, the second surface being on a side opposite to the first surface; and

a pair of electrodes in electrical contact with the oxide semiconductor layer,

wherein the protective layer contains silicon and oxygen,

wherein the protective layer includes nitrogen,

wherein the protective layer includes a number of defects so that, in a log-log graph showing amount of change in threshold voltage of the transistor with respect to time during which a load is applied to the transistor, an angle between a power approximation line of absolute values of the amount of change in threshold voltage of the transistor and a straight line indicating that absolute values of amount of change in threshold voltage of a transistor are 0 V is greater than or equal to 3° and

less than 20°

,

wherein the protective layer includes the number of defects so that, when the time during which the load is applied to the transistor is 0.1 hours, an absolute value of the amount of change in threshold voltage of the transistor is smaller than 0.3 V, and

wherein a space of a logarithmic scale on a lateral axis is equal to that on a longitudinal axis in the log-log graph.

17. The semiconductor device according to claim 16,

wherein the gate electrode is over an insulating surface, and

wherein the protective layer, the oxide semiconductor layer, and the gate insulating layer are between the insulating surface and the gate electrode.

18. The semiconductor device according to claim 16,

wherein the gate electrode is over an insulating surface, and

wherein the gate electrode and the gate insulating layer are between the insulating surface and the oxide semiconductor layer.

22. The semiconductor device according to claim 16,

wherein the protective layer comprises a portion whose spin density measured by electron spin resonance spectroscopy is greater than or equal to 1×

10¹⁷ spins/cm³ and less than 1×

10¹⁸ spins/cm³, and

wherein an electron spin resonance spectrum of the portion has a first signal that appears at a g-factor in a range greater than or equal to 2.037 and less than or equal to 2.039, a second signal that appears at a g-factor in a range greater than or equal to 2.001 and less than or equal to 2.003, and a third signal that appears at a g-factor in a range greater than or equal to 1.964 and less than or equal to 1.966.

19. A semiconductor device comprising:

a transistor comprising;

an oxide semiconductor layer and a gate electrode overlapping with each other,

a gate insulating layer between the gate electrode and the oxide semiconductor layer, the gate insulating layer being in contact with a first surface of the oxide semiconductor layer;

a protective layer in contact with a second surface of the oxide semiconductor layer, the second surface being on a side opposite to the first surface; and

a pair of electrodes in electrical contact with the oxide semiconductor layer,

wherein the protective layer contains silicon and oxygen,

wherein the protective layer includes nitrogen,

wherein the protective layer includes a number of defects so that an index of a power approximation line of amount of change in threshold voltage of the transistor with respect to time during which a load is applied to the transistor is greater than or equal to −

0.1 and less than or equal to 0.3, and

wherein the protective layer includes the number of defects so that, when the time during which the load is applied to the transistor is 0.1 hours, an absolute value of the amount of change in threshold voltage of the transistor is smaller than 0.3 V.

20. The semiconductor device according to claim 19,

wherein the gate electrode is over an insulating surface, and

wherein the protective layer, the oxide semiconductor layer, and the gate insulating layer are between the insulating surface and the gate electrode.

21. The semiconductor device according to claim 19,

wherein the gate electrode is over an insulating surface, and

wherein the gate electrode and the gate insulating layer are between the insulating surface and the oxide semiconductor layer.

23. The semiconductor device according to claim 19,

wherein the protective layer comprises a portion whose spin density measured by electron spin resonance spectroscopy is greater than or equal to 1×

10¹⁷ spins/cm³ and less than 1×

10¹⁸ spins/cm³, and

wherein an electron spin resonance spectrum of the portion has a first signal that appears at a g-factor in a range greater than or equal to 2.037 and less than or equal to 2.039, a second signal that appears at a g-factor in a range greater than or equal to 2.001 and less than or equal to 2.003, and a third signal that appears at a g-factor in a range greater than or equal to 1.964 and less than or equal to 1.966.