Upstream forward error correction codeword filling

• US 9,647,692 B2
• Filed: 01/21/2015
• Issued: 05/09/2017
• Est. Priority Date: 01/24/2014
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Inventors: Prodan, Richard S.
• Primary Examiner(s): Kerveros, James C
• Application Number:
  US14/602,174
• Publication Number:
  US 20150214981A1
• Time in Patent Office: 839 Days
• Field of Search: 714755
• CPC Class Codes: H03M 13/09 Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
• CPC Class Codes: H03M 13/17 Burst error correction, e.g. error trapping, Fire codes
• CPC Class Codes: H04B 10/27 Arrangements for networking
• CPC Class Codes: H04L 1/0042 Encoding specially adapted to other signal generation operation, e.g. in order to reduce transmit distortions, jitter, or to improve signal shape H04L1/0067 takes precedence
• CPC Class Codes: H04L 1/0057 Block codes H04L1/0061, H04L1/0064 take precedence
• CPC Class Codes: H04L 1/0083 Formatting with frames or packets; Protocol or part of protocol for error control
• CPC Class Codes: H04L 1/1867 Arrangements specially adapted for the transmitter end
• CPC Class Codes: H04L 1/1874 Buffer management
• CPC Class Codes: H04L 25/4908 using mBnB codes

Abstract

A device for codeword filling comprises at least one processor circuit. The at least one processor circuit is configured to receive portions of a data burst, encode the portions into blocks, and add the blocks to a buffer. The at least one processor circuit is configured to generate a first codeword from blocks of the buffer when a number of blocks in the buffer satisfies a threshold, remove the blocks from the buffer, and provide the first codeword for transmission. The at least one processor circuit is configured to generate a set of codewords from remaining blocks of the buffer when a marker indicating a data burst end is detected, the set of codewords being determined based at least on a number of the remaining blocks in the buffer when the marker is detected. The at least one processor circuit is configured to provide the set of codewords for transmission.

Claims

1. A device, comprising:

at least one processor circuit configured to;

receive portions of a data burst, arrange the portions into data blocks, and add the data blocks to a buffer;

generate a first codeword from a first number of data blocks of the buffer when a number of data blocks in the buffer satisfies a threshold, remove the first number of data blocks from the buffer, and provide the first codeword for transmission, the buffer having a second number of data blocks remaining when the first number of data blocks are removed;

generate a set of second codewords from the second number of data blocks of the buffer when a marker indicating an end of the data burst is detected, wherein at least one codeword of the set of second codewords is different in size from the first codeword; and

provide the set of second codewords for transmission.

2. The device of claim 1, wherein the marker indicating the end of the data burst is detected before the number of data blocks in the buffer satisfies the threshold.

3. The device of claim 1, wherein the set of second codewords consists of a single codeword, or the set of second codewords comprises a plurality of codewords, each of the plurality of codewords comprising a different number of information bits.

4. The device of claim 1, wherein the second set of codewords comprises a plurality of codewords, each of the plurality of codewords having a different size.

5. The device of claim 1, wherein the at least one processor circuit is configured to determine a number of codewords in the set of second codewords, and a size of each codeword of the set of second codewords, based at least in part on a mapping between sets of codewords and numbers of bits.

6. The device of claim 5, wherein the at least one processor circuit is configured to determine the number of codewords in the set of second codewords, and the size of each codeword of the set of second codewords, by applying a number of bits of the second number of data blocks in the buffer to the mapping.

7. The device of claim 1, wherein the at least one processor circuit is further configured to:

identify a bin among a plurality of bins based on the number of data blocks contained in the buffer when the marker indicating the end of the data burst is detected,

wherein;

each of the plurality of bins has a respective lower block number threshold and a respective upper block number threshold, and

a number of codewords in the set of second codewords is determined based at least on the identified bin.

8. The device of claim 1, wherein the at least one processor circuit is further configured to:

generate at least one cyclic redundancy check block based at least on a portion of the second number of data blocks; and

generate at least one parity block based at least on the portion of the second number of data blocks,

wherein at least one codeword of the set of second codewords is generated based at least on the portion of the remaining data blocks, the at least one cyclic redundancy check block, and the at least one parity block.

9. The device of claim 1, wherein the threshold corresponds to a number of data blocks used to generate a maximum-sized codeword.

10. The device of claim 1, wherein a number of codewords in the set of second codewords is based at least on the second number of data blocks of the buffer when the marker is detected.

11. The device of claim 1, wherein each of the data blocks consists of a fixed number of bits, and the at least one processor circuit is configured to detect the end of the data burst without a priori knowledge of a size of the data burst.

12. A method, comprising:

arranging a portion of a data burst into a first data block;

storing the first data block in at least one buffer, wherein the at least one buffer contains one or more data blocks associated with the data burst;

determining a number of data blocks contained in the at least one buffer upon storing the first data block;

determining whether the portion includes an end burst marker indicating an end of the data burst;

generating at least one codeword based at least on the determined number of data blocks and on whether the portion includes the end burst marker, wherein the at least one codeword is generated based at least on a subset of one or more data blocks contained in the at least one buffer upon storing the first data block; and

providing the at least one codeword for transmission.

13. The method of claim 12, further comprising:

identifying a bin among a plurality of bins based on the number of data blocks contained in the buffer when the portion of the data burst contains the end burst marker,

wherein;

each of the plurality of bins has a respective lower block number threshold and a respective upper block number threshold, and

a number of codewords in the at least one codeword is based on the identified bin.

14. The method of claim 12, wherein:

the at least one buffer comprises the one or more data blocks and the first data block;

the at least one codeword comprises a first codeword when the determined number of data blocks in the buffer exceeds a predetermined maximum number of data blocks; and

the first codeword is based on the one or more data blocks of the data burst in the at least one buffer.

15. The method of claim 12, wherein:

the at least one buffer comprises the one or more data blocks and the first data block, and

each of the at least one codeword is of one of a plurality of predetermined sizes.

16. The method of claim 15, wherein the at least one codeword comprises a first codeword and a second codeword of a different size from the first codeword.

17. The method of claim 12, wherein a number of codewords in the at least one codeword is based at least on the determined number of data blocks and on whether the portion includes the end burst marker.

18. A computer program product comprising instructions stored in a non-transitory computer-readable storage medium, the instructions when executed by a computer, cause the computer to perform operations, the instructions comprising:

instructions to receive a data burst;

instructions to decode a first portion of the data burst as a first set of codewords, each of the first set of codewords has a first number of bits; and

instructions to decode a second portion of the data burst as a second set of codewords, wherein a number of codewords of the second set of codewords is determined based at least in part on a second number of bits of the second portion of the data burst, the second number of bits being less than the first number of bits.

19. The computer program product of claim 18, wherein instructions to code comprises, for each codeword:

instructions to perform a parity computation based on one or more parity blocks in the codeword;

instructions to remove the one or more parity blocks from the codeword to form a first set of blocks when the parity computation is successful;

instructions to compute a cyclic redundancy check (CRC) value based on the first set of blocks;

instructions to compare the computed CRC value with CRC information contained in the first set of blocks;

instructions to remove the CRC information from the first set of blocks to form a second set of blocks when the computed CRC value matches the CRC information; and

instructions to line decode the second set of blocks to obtain a portion of the data burst associated with the codeword.

20. The computer program product of claim 18, wherein the instructions further comprise:

instructions to determine a number of bits in the second set of codewords; and

instructions to identify a bin among a plurality of bins based on the determined number of bits,

wherein;

each of the plurality of bins has a respective lower bit number threshold and a respective upper bit number threshold, and

the number of codewords in the second set of codewords and a size associated with each codeword of the second set of codewords is determined based at least in part on the identified bin.