Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the method

• US 9,648,733 B2
• Filed: 04/11/2013
• Issued: 05/09/2017
• Est. Priority Date: 06/28/2007
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Li, Yonggang, Salama, Islam, Gurumurthy, Charan, Azimi, Hamid
• Primary Examiner(s): Chen, Xiaoliang
• Application Number:
  US13/861,338
• Publication Number:
  US 20130242498A1
• Time in Patent Office: 1,489 Days
• Field of Search: 174250, 174254-256, 174258-264, 174266, 361728, 361760, 361762, 361783, 361794, 29830, 29852, 257698, 257704, 257778
• CPC Class Codes: H05K 1/0298 Multilayer circuits
• CPC Class Codes: H05K 1/0306 Inorganic insulating substrates, e.g. ceramic, glass
• CPC Class Codes: H05K 1/115 Via connections; Lands around holes or via connections H05K1/112 takes precedence
• CPC Class Codes: H05K 1/18 Printed circuits structurally associated with non-printed electric components H05K1/0201, H05K1/023, H05K1/0243, and H05K1/16 take precedence
• CPC Class Codes: H05K 2201/0394 Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
• CPC Class Codes: H05K 2201/09563 Metal filled via
• CPC Class Codes: H05K 2201/0959 Plated through-holes or plated blind vias filled with insulating material
• CPC Class Codes: H05K 2201/0969 Apertured conductors
• CPC Class Codes: H05K 3/0032 of organic insulating material
• CPC Class Codes: H05K 3/0035 of blind holes, i.e. having a metal layer at the bottom
• CPC Class Codes: H05K 3/0038 combined with laser drilling through a metal layer
• CPC Class Codes: H05K 3/426 initial plating of through-holes in substrates without metal
• CPC Class Codes: H05K 3/427 initial plating of through-holes in metal-clad substrates
• CPC Class Codes: H05K 3/429 Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
• CPC Class Codes: H05K 3/4644 by building the multilayer layer by layer, i.e. build-up multilayer circuits making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602
• CPC Class Codes: H05K 3/4652 Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern H05K3/4647 takes precedence
• CPC Class Codes: Y10T 29/49126 Assembling bases
• CPC Class Codes: Y10T 29/49155 Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/49165 by forming conductive walled aperture in base

Abstract

A method of fabricating a substrate core structure comprises: providing first and second patterned conductive layers defining openings therein on each side of a starting insulating layer; providing a first and a second supplemental insulating layers onto respective ones of a first and a second patterned conductive layer; laser drilling a set of via openings extending through at least some of the conductive layer openings of the first and second patterned conductive layers; filling the set of via openings with a conductive material to provide a set of conductive vias; and providing a first and a second supplemental patterned conductive layer onto respective ones of the first and the second supplemental insulating layers, the set of conductive vias contacting the first supplemental patterned conductive layer at one side thereof, and the second supplemental patterned conductive layer at another side thereof.

Claims

1. A multilayer substrate core structure including:

a starting insulating layer having a first side with a first planar surface and an opposite second side with a second planar surface;

a first patterned conductive layer on the first planar surface of the first side of the starting insulating layer, and a second patterned conductive layer on the second planar surface of the second side of the starting insulating layer;

a first supplemental insulating layer on the first patterned conductive layer and on the first planar surface of the first side of the starting insulating layer;

a second supplemental insulating layer on the second patterned conductive layer and on the second planar surface of the second side of the starting insulating layer;

a first supplemental patterned conductive layer on the first supplemental insulating layer;

a second supplemental patterned conductive layer on the second supplemental insulating layer; and

a set of conductive vias provided in corresponding via openings extending from the second supplemental patterned conductive layer to the first supplemental patterned conductive layer, the via openings further extending through the first patterned conductive layer and the second patterned conductive layer, the via openings having a conical configuration providing a wider opening in the first patterned conductive layer than in the second patterned conductive layer, wherein at least one conductive via of the set of conductive vias is in electrical contact with the first and second supplemental patterned conductive layers and with the first and second patterned conductive layers, and wherein the at least one conductive via completely fills the corresponding via opening and has the conical configuration.

2. The substrate core structure of claim 1, wherein the set of conductive vias include a plated conductive material therein.

3. The substrate core structure of claim 1, wherein the set of conductive vias includes a skip via.

4. The substrate core structure of claim 1, wherein the starting insulating layer and the supplemental insulating layer each comprise at least one of a glass epoxy resin and bismaleimide-triazine (BT).