Signal monitoring of through-wafer vias using a multi-layer inductor

• US 9,658,255 B2
• Filed: 08/20/2015
• Issued: 05/23/2017
• Est. Priority Date: 01/02/2014
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Robson, Norman W., Peterson, Kirk D., DiRocco, Mark A., Stevens, Keith C.
• Primary Examiner(s): ZHU, SHENG-BAI
• Application Number:
  US14/831,151
• Publication Number:
  US 20150362534A1
• Time in Patent Office: 642 Days
• Field of Search: 257621, 257528, 324117 H
• CPC Class Codes: G01R 17/00 Measuring arrangements involving comparison with a reference value, e.g. bridge
• CPC Class Codes: G01R 19/00 Arrangements for measuring currents or voltages or for indicating presence or sign thereof G01R5/00 takes precedence; for measuring bioelectric currents or voltages A61B5/24
• CPC Class Codes: G01R 31/2648 Characterising semiconductor materials testing of materials or semi-finished products G01R31/2831; testing during manufacture H01L22/00
• CPC Class Codes: G01R 31/2853 Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections G01R31/31717 takes precedence; test of chip-to-PCB or lead-to-PCB connections G01R31/66
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 22/14 for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
• CPC Class Codes: H01L 22/34 Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line switching, multiplexing, gating devices G01R19/25; process control with lithography, e.g. dose control, G03F7/20; structures for alignment control by optical means G03F7/70633
• CPC Class Codes: H01L 2225/06544 Design considerations for via connections, e.g. geometry or layout
• CPC Class Codes: H01L 2225/06596 Structural arrangements for testing
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 28/10 Inductors
• CPC Class Codes: H01L 28/40 Capacitors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/19042 being an inductor
• CPC Class Codes: H01L 2924/19104 on the semiconductor or solid-state device, i.e. passive-on-chip

Abstract

According to a method herein, a multi-level inductor is created around a through-silicon-via (TSV) in a semiconductor substrate. A voltage induced in the multi-level inductor by current flowing in the TSV is sensed, using a computerized device. The voltage is compared to a reference voltage, using the computerized device. An electrical signature of the TSV is determined based on the comparing the voltage to the reference voltage, using the computerized device.

Claims

1. A structure for identifying failed components in an integrated circuit, said structure comprising:

a wafer comprising a multilayer silicon substrate;

an active device in a layer of said multilayer silicon substrate;

a through-silicon-via (TSV) structure extending through multiple levels of said multilayer silicon substrate and operatively attached to said active device, said TSV passing electrical current between layers of said multilayer silicon substrate;

a single multi-level coil inductor in said multilayer silicon substrate, said single multi-level coil inductor surrounding said TSV and extending through multiple levels of said multilayer silicon substrate; and

a comparator having multiple inputs, a reference voltage being applied to a first input of said comparator,

said single multi-level coil inductor being connected to ground at a first end and connected to a second input of said comparator at a second end,

said electrical current in said TSV inducing measured voltage in said single multi-level coil,

said comparator having a structure that compares said reference voltage to said measured voltage, and

said comparator having a structure that outputs an indication of failure of said TSV based on said measured voltage not matching said reference voltage.

2. The structure according to claim 1, said single multi-level coil inductor being connected to sensing signal at said first end and connected to said second input of said comparator at said second end.

3. The structure according to claim 1, further comprising:

an amplifier operatively connected between said single multi-level coil inductor and said comparator.

4. The structure according to claim 1, further comprising:

a multiplexer operatively connected between said single multi-level coil inductor and said comparator.

5. The structure according to claim 4, said multiplexer having multiple TSVs connected as inputs to said multiplexer and a single output to said comparator.

6. The structure according to claim 4, said multiplexer having multiple TSVs connected as inputs to said multiplexer and multiple outputs to said comparator.

7. The structure according to claim 6, said reference voltage comprising one of:

a voltage induced in another TSV,

a predetermined voltage, and

a voltage from another circuit.

8. The structure according to claim 1, said active device comprising one of:

a transistor,

a capacitor, and

a resistor.

9. A device for identifying failed components in an integrated circuit, said device comprising:

a substrate having multiple layers;

a through-silicon-via (TSV) extending through said substrate, said TSV passing electrical current through said substrate;

a single coil inductor surrounding said TSV and extending through said multiple layers of said substrate, said electrical current in said TSV inducing measured voltage in said single coil inductor; and

a comparator having a structure that compares a reference voltage to said measured voltage,

said comparator having a structure that outputs an indication of failure of said TSV based on said measured voltage not matching said reference voltage.

10. The device according to claim 9,

said comparator having said reference voltage applied to a first input of said comparator,

said single coil inductor having a first end and a second end, said single coil inductor being connected at said first end to ground and being connected at said second end to a second input of said comparator.

11. The device according to claim 10, said reference voltage comprising one of:

a voltage induced in another TSV,

a predetermined voltage, and

a voltage from another circuit.

12. The device according to claim 10, said single coil inductor being connected to a sensing signal at said first end and connected to said second input of said comparator at said second end.

13. The device according to claim 10, further comprising:

an amplifier operatively connected between said single coil inductor and said comparator.

14. The device according to claim 10, further comprising:

a multiplexer operatively connected between said single coil inductor and said comparator.

15. The device according to claim 14, said multiplexer being connected to multiple TSVs as inputs to said multiplexer and a single output to said comparator.

16. The device according to claim 14, said multiplexer being connected to multiple TSVs as inputs to said multiplexer and multiple outputs to said comparator.

17. A structure for identifying failed components in an integrated circuit, said structure comprising:

a substrate having multiple layers;

an active device in a layer of said substrate;

a through-silicon-via (TSV) structure extending through said substrate and operatively attached to said active device, said TSV passing electrical current between layers of said substrate;

a single multi-level coil inductor surrounding said TSV and extending through said multiple layers of said substrate, said electrical current in said TSV inducing measured voltage in said single multi-level coil inductor; and

a comparator having a structure that compares a reference voltage to said measured voltage,

said comparator having a structure that outputs an indication of failure of said TSV based on said measured voltage not matching said reference voltage.

18. The structure according to claim 17, said active device comprising one of:

a transistor,

a capacitor, and

a resistor.

19. The structure according to claim 17, further comprising:

a comparator having a reference voltage applied to a first input of said comparator,

said single multi-level coil inductor having a first end and a second end, said single multi-level coil inductor being connected at said first end to a reference signal and being connected at said second end to a second input of said comparator.

20. The structure according to claim 19, further comprising:

an amplifier operatively connected between said single multi-level coil inductor and said comparator.