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Semiconductor devices including stair step structures, and related methods

  • US 9,659,950 B2
  • Filed: 10/08/2015
  • Issued: 05/23/2017
  • Est. Priority Date: 07/01/2013
  • Status: Active Grant
First Claim
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1. A vertical memory device comprising:

  • an elongated vertical memory array block including vertical strings of memory cells extending through at least thirty-two conductive tiers; and

    a stair step structure including contact regions of respective conductive tiers of the at least thirty-two conductive tiers,wherein the elongated vertical memory array block has a lateral width of about 5 μ

    m or less.

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