Thin film transistor substrate and method of manufacturing the same

• US 9,660,099 B2
• Filed: 10/22/2015
• Issued: 05/23/2017
• Est. Priority Date: 12/05/2014
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Kim, Hyung-Jun, Bang, Seok-Hwan, Lim, Ji-Man
• Primary Examiner(s): Soward, Ida M
• Application Number:
  US14/920,741
• Publication Number:
  US 20170117415A1
• Time in Patent Office: 579 Days
• CPC Class Codes: H01L 21/02126 the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
• CPC Class Codes: H01L 21/022 the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides adhesion layers or buffer layers H01L21/02304, H01L21/02362
• CPC Class Codes: H01L 21/02252 formation by plasma treatment, e.g. plasma oxidation of the substrate after treatment of an insulating film by plasma H01L21/3105 and subgroups
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A thin film transistor substrate includes a gate electrode disposed on a base substrate, an active pattern overlapping the gate electrode, a source metal pattern including both a source electrode disposed on the active pattern and a drain electrode spaced apart from the source electrode, a buffer layer disposed on the source metal pattern and contacting the active pattern, a first passivation layer disposed on the buffer layer and a second passivation layer disposed on the first passivation layer. The density of hydrogen in the buffer layer is greater than the density of hydrogen in the first passivation layer and less than the density of hydrogen in the second passivation layer.

Claims

1. A thin film transistor substrate comprising:

a gate electrode disposed on a base substrate;

an active pattern overlapping the gate electrode;

a source metal pattern comprising both a source electrode disposed on the active pattern and a drain electrode spaced apart from the source electrode;

a buffer layer disposed on the source metal pattern and contacting the active pattern;

a first passivation layer disposed on the buffer layer; and

a second passivation layer disposed on the first passivation layer,

wherein a density of hydrogen in the buffer layer is greater than the density of hydrogen in the first passivation layer and less than the density of hydrogen in the second passivation layer.

2. The thin film transistor substrate of claim 1, wherein the buffer layer comprises at least one of silicon oxide (SiOx), aluminum oxide (AlOx), gallium oxide (GaOx), titanium oxide (TiOx), tantalum oxide (TaOx), manganese oxide (MnOx), silicon oxynitride (SiON), aluminum oxynitride (AlON), and gallium oxynitride (GaON).

3. The thin film transistor substrate of claim 2, wherein the buffer layer comprises:

a first sub buffer layer contacting the active pattern;

a second sub buffer layer disposed on the first sub buffer layer; and

a third sub buffer layer disposed on the second sub buffer layer and contacting the first passivation layer.

4. The thin film transistor substrate of claim 3, wherein the density of hydrogen in the first sub buffer layer is greater than the density of hydrogen in the second sub buffer layer, and the density of hydrogen in the second sub buffer layer is greater than the density of hydrogen in the third sub buffer layer.

5. The thin film transistor substrate of claim 3, wherein the first sub buffer layer, the second sub buffer layer and the third sub buffer layer each comprise the same material.

6. The thin film transistor substrate of claim 3, wherein the first sub buffer layer, the second sub buffer layer, the third sub buffer layer and the first passivation layer each comprise the same material.

7. The thin film transistor substrate of claim 1, further comprising:

an insulation layer disposed on the gate electrode; and

a lower buffer layer disposed between the insulation layer and the active pattern.

8. The thin film transistor substrate of claim 7, wherein the density of hydrogen in the lower buffer layer is greater than the density of hydrogen in the first passivation layer.