Thin film transistor and method for manufacturing same

• US 9,660,103 B2
• Filed: 06/24/2014
• Issued: 05/23/2017
• Est. Priority Date: 06/28/2013
• Status: Active Grant

• Current Assignee: Klaus Schmidt
• Original Assignee: Kobe Steel Limited
• Inventors: Goto, Hiroshi, Kugimiya, Toshihiro, Takanashi, Yasuyuki, Ochi, Mototaka, Morita, Shinya
• Primary Examiner(s): Pham, Thanhha
• Application Number:
  US14/888,213
• Publication Number:
  US 20160079437A1
• Time in Patent Office: 1,064 Days
• CPC Class Codes: H01L 21/477 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/38 - H01L21/449 and H01L21/461 - H01L21/475 take precedence
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/247 Amorphous materials
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

This thin film transistor comprises, on a substrate, at least a gate electrode, a gate insulating film, an oxide semiconductor layer, a source-drain electrode, and two or more protective films. The oxide semiconductor layer comprises Sn, O and one or more elements selected from the group consisting of In, Ga and Zn. In addition, the two or more protective films are composed of at least a first protective film that is in contact with the oxide semiconductor film, and one or more second protective films other than the first protective film. The first protective film is a SiO_x film having a hydrogen concentration of 3.5 atomic % or lower.

Claims

1. A thin film transistor comprising, in order;

a gate electrode,

a gate insulator film,

an oxide semiconductor layer,

a source-drain electrode, and

a passivation film comprising more than one layer on a substrate,

wherein

the oxide semiconductor layer comprises O, Sn, In, Ga, and Zn wherein the amount of In, Ga, Zn, and Sn relative to the total amount of In, Ga, Zn, and Sn is;

15 atomic %≦

In≦

25 atomic %,

5 atomic %≦

Ga≦

20 atomic %,

40 atomic %≦

Zn≦

60 atomic %, and

9 atomic %≦

Sn≦

25 atomic %;

the passivation film comprises a first protective film in contact to the oxide semiconductor layer and a second protective film comprising one or more layers other than the first protective film;

the first protective film is a SiO_x film; and

the hydrogen concentration in the first protective film is 3.5 atomic % or lower.

2. The thin film transistor of claim 1, wherein

the second protective film is an insulating compound film or a laminate film comprising a resin film and the insulating compound film.

3. The thin film transistor of claim 2, wherein

the insulating compound film is an oxide, a nitride, or an oxynitride film comprising one or more elements selected from the group consisting of Si, Al, Ti, Ta, Ce, Ga, Hf, Nb, V, W, Y, and Zr.

4. The thin film transistor of claim 3, wherein

the insulating compound film comprises SiN_x film and an oxide film comprising one or more elements selected from the group consisting of Si, Al, Ti, Ta, Ce, Nb, V, W, Y, and Zr.

5. The thin film transistor of claim 2, wherein

the thickness of the first protective film is larger than or equal to 30 nm.

6. The thin film transistor of claim 1, wherein the amount of In relative to the total amount of In, Ga, Zn, and Sn is 16 atomic % to 23 atomic %.

7. The thin film transistor of claim 1, wherein the amount of Ga relative to the total amount of In, Ga, Zn, and Sn is 10 atomic % to 19 atomic %.

8. The thin film transistor of claim 1, wherein the amount of Zn relative to the total amount of in, Ga, Zn, and Sn is 43 atomic % to 60 atomic %.

9. The thin film transistor claim 1, wherein the amount of Zn relative to the total amount of In, Ga, Zn, and Sn is 43 atomic % to 50 atomic %.

10. The thin film transistor of claim 1, wherein

the specific resistance of the oxide semiconductor layer is 2.1×

10² Ω

-cm or larger and 1.0×

10⁵ Ω

-cm or smaller.

11. The thin film transistor of claim 1, wherein

the oxide semiconductor layer comprises Sn in an amount of 15 atomic % to 25 atomic % relative to the total amount of metal elements in the oxide semiconductor layer.

12. The thin film transistor of claim 1, wherein

the amount of In, Ga, Zn, and Sn relative to the total amount of In, Ga, Zn, and Sn is:

16 atomic %≦

In≦

23 atomic %,

10 atomic %≦

Ga≦

19 atomic %,

43 atomic %≦

Zn≦

60 atomic %, and

15 atomic %≦

Sn≦

25 atomic %.

13. The thin film transistor of claim 1, wherein

the thickness of the first protective film is larger than or equal to 30 nm.

14. The thin film transistor as set forth in claim 1 wherein

the source-drain electrode comprises a pure Mo film, a Mo alloy film, or both.

15. The thin film transistor of claim 1, wherein the source-drain electrode is a laminate film comprising;

one or more films selected from a pure Mo film and a Mo alloy film, and are in direct contact to the oxide semiconductor layer; and

one or more films selected from the group consisting of a pure Al film, a pure Cu film, an Al alloy film, and a Cu alloy film.

16. Method of manufacturing the thin film transistor of claim 1 comprising:

forming the gate electrode on the substrate;

forming the gate insulator film on the gate electrode;

forming the oxide semiconductor layer on the gate insulator film wherein the oxide semiconductor layer comprises O, Sn, In, Ga and Zn, the amounts of In, Ga, Zn, and Sn relative to the total amount of In, Ga, Zn, and Sn are;

15 atomic %≦

In ≦

25 atomic %, 5 atomic %≦

Ga ≦

20 atomic %, 40 atomic %≦

Zn≦

60 atomic %, and 9 atomic %≦

Sn≦

25 atomic %;

forming the source-drain electrode on the oxide semiconductor layer comprising carrying out patterning of the source-drain electrode with an acid-based etchant; and

forming the passivation film on the source-drain electrode wherein the passivation film comprises the first protective film in contact to the oxide semiconductor layer and the second protective film comprising one or more layers other than the first protective film, the first protective film is the SiO_x film and the hydrogen concentration in the first protective film is 3.5 atomic % or lower, wherein forming the passivation film comprises carrying out an oxidation treatment after forming the SiO_x as the first protective film and forming the second protective film on the first protective film.

17. The method of claim 16, wherein

the oxidation treatment is a heat treatment conducted at a temperature of higher than or equal to 130°

C. and lower than or equal to 400°

C.

18. The method of claim 16 further comprising;

carrying out a heat treatment after the forming of the second protective film.

19. The method of claim 17, further comprising:

carrying out a heat treatment after the forming of the second protective film.