Optimized data converter design using mixed semiconductor technology for flexible radio communication systems

• US 9,660,690 B2
• Filed: 11/06/2015
• Issued: 05/23/2017
• Est. Priority Date: 11/06/2014
• Status: Active Grant

• Current Assignee: GM Global Technology Operations LLC (General Motors Company)
• Original Assignee: GM Global Technology Operations LLC (General Motors Company)
• Inventors: Talty, Timothy J., Baringer, Cynthia D., Ahmed, Mohiuddin, Cosand, Albert E., Li, James Chingwei, Petre, Peter, Xu, Zhiwei A., Kuan, Yen-Cheng
• Primary Examiner(s): Bilodeau, David
• Application Number:
  US15/103,309
• Publication Number:
  US 20160315654A1
• Time in Patent Office: 564 Days
• Field of Search: None
• CPC Class Codes: H04B 1/00 Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
• CPC Class Codes: H04B 1/0007 wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
• CPC Class Codes: H04B 1/0057 using diplexing or multiplexing filters for selecting the desired band
• CPC Class Codes: H04B 1/0483 Transmitters with multiple parallel paths
• CPC Class Codes: H04B 1/18 Input circuits, e.g. for coupling to an antenna or a transmission line coupling networks between antennas or lines and receivers independent of the nature of the receiver H03H
• CPC Class Codes: H04B 1/401 for selecting or indicating operating mode
• CPC Class Codes: H04B 1/48 in circuits for connecting transmitter and receiver to a common transmission path, e.g. by energy of transmitter H04B1/46 takes precedence
• CPC Class Codes: H04B 1/52 Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
• CPC Class Codes: H04L 25/02 Details ; arrangements for supplying electrical power along data transmission lines systems for transmitting signals via power distribution lines H04B3/54

Abstract

A cellular radio architecture that includes a receiver module having a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture further includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to analog transmit signals. Portions of the receiver and transmitter modules are fabricated with silicon germanium (SiGe) technologies and portions of the receiver and transmitter modules are fabricated with CMOS technologies.

Claims

1. A transceiver front-end circuit for a cellular radio, said transceiver circuit comprising:

an antenna structure operable to transmit signals and receive signals;

a multiplexer coupled to the antenna structure and including three signal paths, each signal path including a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals;

a receiver module including a separate signal channel for each of the signal paths in the multiplexer, each signal channel in the receiver module including a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal, wherein portions of the receiver module are fabricated with silicon germanium (SiGe) technologies and portions of the receiver module are fabricated with CMOS technologies; and

a transmitter module including a transmitter delta-sigma modulator for converting digital data bits to the transmit signals, said transmitter module including a tunable bandpass filter, a power amplifier and a switch for directing the transmit signals to one of the signal paths in the multiplexer, wherein portions of transmitter module are fabricated with silicon germanium (SiGe) technologies and portions of the transmitter module are fabricated with CMOS technologies.

2. The transceiver circuit according to claim 1 wherein components and devices that operate at higher frequencies employ the SiGe technologies and components and devices that operate at lower frequencies employ the CMOS technologies.

3. The transceiver circuit according to claim 1 wherein at least some of the SiGe and CMOS technologies in the receiver module are integrated using a micro-bump integration fabrication process and at least some of the SiGe and CMOS technologies in the transmitter module are integrated using a micro-bump integration fabrication process.

4. The transceiver circuit according to claim 1 wherein the SiGe technologies include SiGe double heterojunction bipolar transistor (DHBT) technologies.

5. The transceiver circuit according to claim 1 wherein each receiver delta-sigma modulator includes a combiner, a low noise amplifier (LNA), an LC filter and a quantizer circuit, and wherein the combiner, the LNA and portions of the LC filter are fabricated with SiGe technologies and portions of the LC filter are fabricated with CMOS technologies.

6. The transceiver circuit according to claim 5 wherein an inductor circuit in the LC filter is fabricated with SiGe technologies and a capacitor circuit in the LC circuit is fabricated with CMOS technologies.

7. The transceiver circuit according to claim 5 wherein the LC filter is a sixth-order filter.

8. The transceiver circuit according to claim 7 wherein the LC filter includes a plurality of LC resonator circuits, a plurality of transconductance amplifiers and a plurality of integrator circuits, where a combination of one resonator circuit, transconductance amplifier and integrator circuit represents a two-order stage of the LC filter.

9. The transceiver circuit according to claim 8 wherein each LC circuit includes an inductor and a capacitor array where the capacitor array includes a plurality of capacitors controlled by switches that provide coarse and fine tuning.

10. The transceiver circuit according to claim 5 wherein the LC filter includes a low-speed digital-to-analog converter (DAC) array that receives coefficient control bits to control the integrator circuits.

11. The transceiver circuit according to claim 1 wherein the transmitter module further includes a data weighted averaging (DWA) circuit that receives the transmit signals from the transmitter delta-sigma modulator and a digital-to-analog converter (DAC) that receives the transmit signals from the DWA circuit, wherein the DAC is fabricated in SiGe HBT technologies.

12. The transceiver circuit according to claim 11 wherein the DWA circuit modulates the digital thermal codes to shape out voltage and timing mismatch through DAC weighting elements, and wherein the DAC is a 4-bit DAC.

13. The transceiver circuit according to claim 11 wherein the transmitter delta-sigma modulator includes a dynamic element matching (DEM) circuit that employs an interleaving DEM algorithm.

14. The transceiver circuit according to claim 13 wherein a separate DEM circuit is provided for each bit of the DAC.

15. The transceiver circuit according to claim 1 wherein the power amplifier is fabricated in silicon germanium (SiGe) heterojunction bipolar transistor (HBT) and gallium nitride (GaN) high electron mobility transistor (HEMT) technologies.

16. The transceiver circuit according to claim 1 wherein the cellular radio is an automobile cellular radio.

17. A transceiver front-end circuit for a cellular radio, said transceiver circuit comprising:

an antenna structure operable to transmit signals and receive signals;

a multiplexer coupled to the antenna structure and including three signal paths, each signal path including a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals;

a receiver module including a separate signal channel for each of the signal paths in the multiplexer, each signal channel in the receiver module including a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal, wherein portions of the receiver module are fabricated with silicon germanium (SiGe) technologies and portions of the receiver module are fabricated with CMOS technologies, and wherein each receiver delta-sigma modulator includes a combiner, a low noise amplifier (LNA), an LC filter and a quantizer circuit, said combiner receiving the receive signals and a feedback signal from the quantizer circuit and providing an error signal to the LNA to provide an amplified error signal, said amplifier error signal being provided to the LC filter to provide a filtered error signal, and the filtered error signal being provided to the quantizer circuit, wherein the combiner, the LNA and portions of the LC filter are fabricated with SiGe technologies and portions of the LC filter are fabricated with CMOS technologies; and

a transmitter module including a transmitter delta-sigma modulator for converting digital data bits to the transmit signals, said transmitter module including a tunable bandpass filter, a power amplifier and a switch for directing the transmit signals to one of the signal paths in the multiplexer, wherein portions of transmitter module are fabricated with silicon germanium (SiGe) technologies and portions of the transmitter module are fabricated with CMOS technologies.

18. A transceiver front-end circuit for a cellular radio, said transceiver circuit comprising:

an antenna structure operable to transmit signals and receive signals;

a multiplexer coupled to the antenna structure and including three signal paths, each signal path including a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals;

a receiver module including a separate signal channel for each of the signal paths in the multiplexer, each signal channel in the receiver module including a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal, wherein portions of the receiver module are fabricated with silicon germanium (SiGe) technologies and portions of the receiver module are fabricated with CMOS technologies, and wherein each receiver delta-sigma modulator includes a combiner, a low noise amplifier (LNA), a summation node, an LC filter and a quantizer circuit, said summation node receiving amplified receive signals from the LNA and a feedback signal from the quantizer circuit and providing an error signal to the LC filter to provide a filtered error signal, where the filtered error signal is provided to the quantizer circuit, wherein the combiner, the LNA and portions of the LC filter are fabricated with SiGe technologies and portions of the LC filter are fabricated with CMOS technologies; and

a transmitter module including a transmitter delta-sigma modulator for converting digital data bits to the transmit signals, said transmitter module including a tunable bandpass filter, a power amplifier and a switch for directing the transmit signals to one of the signal paths in the multiplexer, wherein portions of transmitter module are fabricated with silicon germanium (SiGe) technologies and portions of the transmitter module are fabricated with CMOS technologies.