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Wireless communication system with efficient PDCCH processing

  • US 9,660,751 B2
  • Filed: 02/17/2015
  • Issued: 05/23/2017
  • Est. Priority Date: 02/17/2015
  • Status: Active Grant
First Claim
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1. A system comprising a processor and a memory coupled to the processor, the processor for generating a transmission frame of a radio-frequency (RF) signal for a wireless communication system, wherein the processor is configured to:

  • receive downlink control information associated with a transmission channel used for transmitting the RF signal;

    receive a control channel element index associated with the downlink control information;

    determine a scrambling code based on the control channel element index;

    generate a scrambled downlink control information based on the scrambling code;

    modulate the scrambled downlink control information for generating a modulated symbol;

    determine a resource element group (REG) based on the control channel element index;

    map the modulated symbol to the REG for generating the transmission frame;

    store a mapping between a plurality of control channel element indices and a corresponding plurality of scrambling codes in a first lookup table, wherein the plurality of scrambling codes form a scrambling sequence, and wherein the processor fetches the scrambling code from the first lookup table based on the control channel element index;

    store a mapping between a plurality of interleave indices and a corresponding plurality of sequential indices in a second lookup table; and

    store a mapping between the plurality of sequential indices and the corresponding plurality of mapping addresses in a third lookup table, wherein the plurality of interleave indices correspond to a mapping location of a plurality of modulated symbols.

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