Image capturing apparatus and image capturing method

• US 9,661,291 B2
• Filed: 01/20/2016
• Issued: 05/23/2017
• Est. Priority Date: 10/30/2006
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Nagahama, Hiroki, Yoneda, Yutaka, Sato, Nobuyuki, Kosakai, Ryota, Aiki, Katsutoshi, Sase, Masatoshi
• Primary Examiner(s): ADAMS, EILEEN M
• Application Number:
  US15/001,442
• Publication Number:
  US 20160142694A1
• Time in Patent Office: 489 Days
• Field of Search: None
• CPC Class Codes: G11B 27/005 Reproducing at a different information rate from the information rate of recording for television signals H04N5/783
• CPC Class Codes: G11B 27/031 Electronic editing of digitised analogue information signals, e.g. audio or video signals
• CPC Class Codes: G11B 31/006 with video camera or receiver
• CPC Class Codes: H04N 23/10 for generating image signals from different wavelengths
• CPC Class Codes: H04N 23/60 Control of cameras or camera modules
• CPC Class Codes: H04N 23/63 by using electronic viewfinders
• CPC Class Codes: H04N 23/667 Camera operation mode switching, e.g. between still and video, sport and normal or high- and low-resolution modes
• CPC Class Codes: H04N 23/83 specially adapted for colour signals
• CPC Class Codes: H04N 23/843 Demosaicing, e.g. interpolating colour pixel values
• CPC Class Codes: H04N 23/88 for colour balance, e.g. white-balance circuits or colour temperature control
• CPC Class Codes: H04N 23/951 by using two or more images to influence resolution, frame rate or aspect ratio
• CPC Class Codes: H04N 25/134 based on three different wavelength filter elements
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 5/77 between a recording apparatus and a television camera
• CPC Class Codes: H04N 5/772 the recording apparatus and the television camera being placed in the same enclosure
• CPC Class Codes: H04N 5/783 Adaptations for reproducing at a rate different from the recording rate
• CPC Class Codes: H04N 5/91 Television signal processing therefor
• CPC Class Codes: H04N 7/0105 using a storage device with different write and read speed
• CPC Class Codes: H04N 7/0127 by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter
• CPC Class Codes: H04N 9/69 for modifying the colour signals by gamma correction controlling camera response for colour signals H04N23/83
• CPC Class Codes: H04N 9/7904 : using intermediate digital signal processing
• CPC Class Codes: H04N 9/80 : Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
• CPC Class Codes: H04N 9/87 : Regeneration of colour television signals H04N9/80 takes precedence

Abstract

In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed. In a reproducing state, raw data are read from the recording device 111 at a low screen rate according to a display performance of the display section 112 and the raw data that have been read are processed are processed by the pre-processing circuit 202 and the camera signal processing circuit 203 and a reproduced image is displayed by the display section 112.

Claims

1. An imaging apparatus, comprising:

an image sensor that includes a color filter array and is configured to output at a first frame rate a first number of first frames of image data that have not yet been subjected to white balance processing; and

circuitry configured to;

(a) in a recording process,

compress the first frames of image data, without previously performing white balance processing thereon, to generate compressed image data;

store the compressed image data on a storage medium; and

generate a first signal representing a first white-balanced image sequence that is to be displayed on a display as a camera-through image by processing the first frames of image data to generate a second number of white-balanced second frames of image data that is lower than the first number of first frames of image data, and by processing the white-balanced second frames of image data at a second frame rate which is lower than the first frame rate; and

(b) in a reproduction process,

read the compressed image data from the storage medium;

decompress the compressed image data to produce decompressed frames of image data; and

generate a second signal representing a second white-balanced image sequence to be displayed on the display as a slow motion reproduced image by processing the decompressed frames of image data.

2. The imaging apparatus of claim 1, wherein the circuitry is further configured to:

in the reproduction process, generate the second signal by processing the decompressed frames of image data at a third frame rate which is lower than the first frame rate.

3. The imaging apparatus of claim 2, wherein the third frame rate is the same as the second frame rate.

4. The imaging apparatus of claim 1, wherein the circuitry is further configured to:

in the recording process, process the first and second frames of image data such that a ratio of the first number of frames to the second number of frames is the same as a ratio of the first frame rate to the second frame rate.

5. The imaging apparatus of claim 1, wherein the circuitry is further configured to:

in the recording process, generate the first signal such that the first white-balanced image sequence corresponds to at least some of the image data that is currently being captured by the image sensor.

6. The imaging apparatus of claim 5, wherein circuitry is further configured to:

in the recording process, generate the second number of second frames of image data by decimating the first number of first frames of image data.

7. The imaging apparatus of claim 1, wherein:

the image sensor is further configured to output the first number of first frames of image data throughout a first time period; and

the circuitry is further configured to, in the reproduction process, generate the second signal so that the second white-balanced image sequence is displayed on the display throughout a second time period, which is longer than the first time period.

8. The imaging apparatus of claim 1, wherein the circuitry is further configured to:

in the recording process, generate the second number of white-balanced second frames of image data by converting the first number of first frames of image data to the second number of non-white-balanced second frames of image data and subsequently performing white balance processing on the second number of non-white-balanced second frames of image data.

9. The imaging apparatus of claim 8, wherein the circuitry is further configured to:

in the recording process, convert the first number of first frames of image data to the second number of non-white-balanced second frames of image data by decimating the first number of first frames of image data.

10. The imaging apparatus of claim 9, wherein the circuitry is further configured to:

in the recording process, convert the first number of first frames of image data to the second number of non-white-balanced second frames of image data by performing a size adjustment processing on at least some frames of image data.

11. The imaging apparatus of claim 1, wherein the image sensor is configured to be selectively switched between a high-speed image capturing mode in which the image sensor outputs the first frames of image data at the first frame rate, and a lower-speed image capturing mode in which the image sensor outputs the first frames of image data at the second frame rate.

12. The imaging apparatus of claim 1, wherein the second frame rate is one fourth of the first frame rate.

13. The imaging apparatus of claim 1, wherein the circuitry is further configured to:

in the recording process, generate the second number of white-balanced second frames of image data by performing optical correction processing on at least some frames of image data prior to performing white balance processing on those frames of image data.

14. The imaging apparatus of claim 13, wherein the circuitry is further configured to:

in the recording process, perform the optical correction processing by performing shading correction processing.

15. The imaging apparatus of claim 1, wherein the circuitry is further configured to:

in the recording process, generate the first signal by performing a simultaneous forming process on at least some frames of image data.

16. The imaging apparatus of claim 15, wherein the circuitry is further configured to:

in the recording process, generate the first signal by performing aperture correction processing, gamma correction processing, and YC generation processing on at least some frames of image data.

17. The imaging apparatus of claim 1, wherein the display comprises a liquid crystal display and the circuitry is further configured to:

in the recording process, process the white-balanced second frames of image data by performing display processing on those frames of image data to generate the first signal, and provide the first signal to the liquid crystal display so as to cause the liquid crystal display to display the first white-balanced image sequence.

18. The imaging apparatus of claim 1, wherein the circuitry comprises:

first circuitry configured to, in the recording process, generate the first signal; and

second circuitry configured to, in the reproduction process, generate the second signal, wherein at least some of the second circuitry is not included in the first circuitry.

19. The imaging apparatus of claim 18, wherein the first circuitry is configured to perform a different simultaneous forming process than the second circuitry.

20. The imaging apparatus of claim 18, wherein the first circuitry is configured to generate the first signal such that the first white-balanced image sequence represented thereby is of a lower quality than the second white-balanced image sequence represented by the second signal generated by the second circuitry.

21. The imaging apparatus of claim 1, wherein the image sensor is further configured to generate the first frames of image data at a frame rate of approximately 240 frames per second.

22. The imaging apparatus of claim 1, wherein:

the storage medium is configured to be attachable to and detachable from the imaging apparatus so as to allow the compressed image data to be stored on the storage medium when the storage medium is attached to the imaging apparatus and to be processed by a device separate from the imaging apparatus when the storage medium is detached from the imaging apparatus.

23. The imaging apparatus of claim 1, wherein the circuitry is further configured to:

in the recording process, compress the first frames of image data, without previously performing simultaneous forming processing thereon, to generate the compressed image data stored on the storage medium.

24. The imaging apparatus of claim 1, wherein the circuitry is further configured to:

in the recording process, compress the first frames of image data, without previously performing gamma correction processing thereon, to generate the compressed image data stored on the storage medium.

25. The imaging apparatus of claim 1, wherein the circuitry is further configured to:

in the recording process, compress the first frames of image data, without previously performing YC generation processing thereon, to generate the compressed image data stored on the storage medium.

26. The imaging apparatus of claim 1, wherein the circuitry is further configured to:

in the recording process, compress the first frames of image data, without previously performing aperture correction processing thereon, to generate the compressed image data stored on the storage medium.

27. The imaging apparatus of claim 1, wherein the circuitry is further configured to:

in the recording process, compress the first frames of image data, without previously performing optical correction processing thereon, to generate the compressed image data stored on the storage medium.

28. The imaging apparatus of claim 1, wherein the circuitry is further configured to:

in the recording process, compress the first frames of image data, without previously performing shading correction processing thereon, to generate the compressed image data stored on the storage medium.

29. The imaging apparatus of claim 1, wherein the circuitry is further configured to:

in the recording process, compress the first frames of image data by encoding each frame according to a predetermined format for each frame to generate the compressed image data stored on the storage medium.

30. The imaging apparatus of claim 29, wherein the predetermined format for each frame is JPEG (Joint Photographic Experts Group) format.

31. The imaging apparatus of claim 1, wherein the circuitry is further configured such that, in the recording process, the image data that is compressed and stored on the storage medium is RAW image data.

32. The imaging apparatus of claim 1, wherein the color filter array comprises an RGB color filter array.

33. The imaging apparatus of claim 10, wherein the circuitry comprises a microcomputer.