Periodic calibration for communication channels by drift tracking

• US 9,667,359 B2
• Filed: 05/20/2015
• Issued: 05/30/2017
• Est. Priority Date: 01/28/2004
• Status: Active Grant

• Current Assignee: K.Mizra LLC
• Original Assignee: Rambus Inc.
• Inventors: Hampel, Craig E., Ware, Frederick A., Perego, Richard E.
• Primary Examiner(s): Wang, Ted
• Application Number:
  US14/718,019
• Publication Number:
  US 20150256325A1
• Time in Patent Office: 741 Days
• CPC Class Codes: H04B 17/00 Monitoring; Testing of line transmission systems H04B3/46; arrangements for monitoring or testing transmission systems employing electromagnetic waves other than radio waves H04B10/07
• CPC Class Codes: H04B 17/11 for calibration
• CPC Class Codes: H04B 17/21 for calibration; for correcting measurements
• CPC Class Codes: H04L 27/00 Modulated-carrier systems
• CPC Class Codes: H04L 7/0004 Initialisation of the receiver H04L7/0075 and H04L7/10 take precedence
• CPC Class Codes: H04L 7/0016 correction of synchronization errors
• CPC Class Codes: H04L 7/0087 Preprocessing of received signal for synchronisation, e.g. by code conversion, pulse generation or edge detection
• CPC Class Codes: H04L 7/043 Pseudo-noise [PN] codes variable during transmission synchronisation of spread spectrum receivers H04B1/69
• CPC Class Codes: H04L 7/10 Arrangements for initial synchronisation

Abstract

A method and system that provides for execution of a first calibration sequence, such as upon initialization of a system, to establish an operation value, which utilizes an algorithm intended to be exhaustive, and executing a second calibration sequence from time to time, to measure drift in the parameter, and to update the operation value in response to the measured drift. The second calibration sequence utilizes less resources of the communication channel than does the first calibration sequence. In one embodiment, the first calibration sequence for measurement and convergence on the operation value utilizes long calibration patterns, such as codes that are greater than 30 bytes, or pseudorandom bit sequences having lengths of 2^N−1 bits, where N is equal to or greater than 7, while the second calibration sequence utilizes short calibration patterns, such as fixed codes less than 16 bytes, and for example as short as 2 bytes long.

Claims

1. A method of operation as carried out by a component, the method comprising:

performing a first calibration during initialization of the component, the first calibration to identify an initial value for a parameter pertaining to at least driver strength and termination resistance; and

periodically performing second calibrations to update the value for the parameter, the value being updated for drift attributable to change in at least one of operating voltage or temperature, wherein the second calibrations are each to occur during a time period that is shorter than a time period of the first calibration.

2. The method of claim 1, wherein periodically performing second calibrations includes (a) calculating an interval and (b) performing one of the second calibrations at each expiration of the interval.

3. The method of claim 1, wherein the parameter further includes a voltage level for a comparator, the first calibration to identify an initial value for the voltage level of the comparator.

4. The method of claim 1, wherein the parameter further includes a sample time for a receiver, the first calibration to identify an initial value for the sample time of the receiver.

5. The method of claim 1, wherein the parameter further includes a drive time for a transmitter, the first calibration to identify an initial value for the drive time of the transmitter.

6. The method of claim 1, wherein performing the first calibration comprises performing a first set of operations to determine the initial value of the parameter, and wherein performing the second calibrations comprises performing a second set of operations to update the existing value if a desired value of the parameter has drifted from the existing value by more than a delta value.

7. The method of claim 1, wherein performing the second calibrations comprises suspending transmit and receive operations on the component.

8. The method of claim 1, wherein performing the first calibration comprises receiving a first pattern and comparing the first pattern with a first expected pattern, and wherein performing the second calibrations comprises receiving a second pattern and comparing the second pattern with a second expected pattern.

9. A component comprising:

a transmitter circuit having a driver to output data onto a communication link, the driver having a driver strength setting;

circuitry to store a value representative of at least one of a termination resistance and the driver strength setting; and

circuitry to perform calibration, the calibration including a first calibration at system initialization, to establish the value during a first calibration interval that occurs prior to normal system operation, and during the normal system operation, to perform second calibrations to update the value, wherein the second calibrations are each performed during a second calibration interval that is shorter than the first calibration interval.

10. The component of claim 9, wherein the first calibration comprises a first set of operations performed to establish the value during the first calibration interval, and wherein the second calibrations each comprise a second set of operations that are performed to update the existing value if a desired value of a parameter of at least one of the termination resistance or the driver strength setting has drifted from the value by more than a delta value.

11. The component of claim 9, wherein performance of the second calibrations comprises suspending output of data by the transmitter circuit.

12. The component of claim 9, wherein the first calibration comprises receipt of a first pattern and comparison of the first pattern with a first expected pattern, and wherein each of the second calibrations comprises receipt of a second pattern and comparison of the second pattern with a second expected pattern.

13. The component of claim 9, further comprising a circuit to perform, responsive to each of the second calibrations, one of an increment operation or a decrement operation upon the value if a desired value of a parameter has drifted from the existing value by more than a delta value, the parameter pertaining to one of termination resistance and the driver strength setting.

14. The component of claim 9, further comprising circuitry to store a first expected pattern and a second expected pattern, and circuitry to compare the first expected pattern with a pattern received in association with the first calibration, and to compare the second expected pattern with a pattern received in association with at least one of the second calibrations.

15. A component comprising:

a transmitter circuit to output data onto the communication link in accordance with a plurality of parameters; and

circuitry to perform calibration including a first calibration at system initialization, to establish initial values for the plurality of parameters during a first calibration interval that occurs prior to normal system operation, and the circuitry to perform calibration to perform a second calibration during the normal system operation, the second calibration to update the initial values for the plurality of parameters during the normal system operation, wherein the second calibration is performed during a second calibration interval that is shorter than the first calibration interval.

16. The component of claim 15, wherein the plurality of parameters comprise at least a driver strength setting of the transmitter circuit and a termination resistance.

17. The component of claim 15, wherein the plurality of parameters comprise drive strength, drive timing and adaptive equalization.

18. The component of claim 15, further comprising a receiver circuit to receive data from the communication link in accordance with receive parameters, wherein the receive parameters comprise a voltage level for a comparator of the receiver circuit.

19. The component of claim 15, wherein the circuitry to perform the calibration is, responsive to the second calibration, to perform one of an increment operation or a decrement operation to update the initial values in the presence of drift.

20. The component of claim 15, further comprising circuitry to store a first expected pattern and a second expected pattern, and circuitry to compare the first expected pattern with a pattern received from an external component in association with the first calibration, and to compare the second expected pattern with a pattern received from the external component in association with the second calibration.