Load control backup signal generating circuit

• US 9,672,111 B2
• Filed: 06/04/2015
• Issued: 06/06/2017
• Est. Priority Date: 06/09/2014
• Status: Active Grant

• Current Assignee: Yazaki Corporation
• Original Assignee: Yazaki Corporation
• Inventors: Wataru, Kazuhisa
• Primary Examiner(s): Bonzo, Bryce
• Assistant Examiner(s): GIBSON, JONATHAN D
• Application Number:
  US14/730,388
• Publication Number:
  US 20150355973A1
• Time in Patent Office: 733 Days
• CPC Class Codes: G06F 1/06 Clock generators producing several clock signals G06F1/08 - G06F1/14 take precedence
• CPC Class Codes: G06F 11/0706 the processing taking place on a specific hardware platform or in a specific software environment
• CPC Class Codes: G06F 11/0757 by exceeding a time limit, i.e. time-out, e.g. watchdogs
• CPC Class Codes: G06F 11/1402 Saving, restoring, recovering or retrying
• CPC Class Codes: G06F 11/1604 where the fault affects the clock signals of a processing unit and the redundancy is at or within the level of clock signal generation hardware
• CPC Class Codes: G06F 2201/85 Active fault masking without idle spares

Abstract

A load control backup signal generating circuit for supplying a backup control signal to a switch of a load connected to an output of a control processor in a case that abnormality occurs in the control processor, includes a first input terminal that receives a constant period signal that is output periodically from the control processor when the control processor is normal, a constant period signal monitoring section that monitors a state of the constant period signal for identifying whether a length of the time during which a high or low level state of the constant period signal continues is longer than a predetermined time, and that outputs the signal corresponding to a result of the identification, and a backup signal output section that outputs the backup control signal when the output of the constant period signal monitoring section satisfies a predetermined condition.

Claims

1. A load control backup signal generating circuit configured to supply a backup control signal to a switch of a load connected to an output of a control processor operating according to a program in a case that abnormality occurs in the control processor, the backup signal generating circuit comprising:

a first input terminal configured to receive a constant period signal that is output periodically from the control processor when the control processor is normal;

a constant period signal monitoring section configured to monitor a state of the constant period signal to identify whether a first length of time during which a high or low level state of the constant period signal continues is longer than a first predetermined time, and to output a first signal corresponding to a result of the identification by the constant period signal monitoring section;

a backup signal output section configured to generate and output the backup control signal to the switch of the load when the output of the constant period signal monitoring section satisfies a first predetermined condition;

a second input terminal configured to receive a control signal configured to control the switch of the load and that is output from the control processor to the switch of the load when the control processor is normal; and

a control signal monitoring section configured to monitor a state of the control signal, to identify whether a second length of time during which an abnormal level state of the control signal continues is longer than a second predetermined time, and to output a second signal corresponding to a result of the identification by the control signal monitoring section,

wherein the constant period signal is not output to the switch of the load.

2. The load control backup signal generating circuit according to claim 1,

wherein the backup control signal output section is further configured to generate the backup control signal when an output of the control signal monitoring section satisfies a second predetermined condition.

3. The load control backup signal generating circuit according to claim 2, wherein the backup signal output section is further configured to generate the backup control signal according to a logical OR of a state in which the output of the constant period signal monitoring section satisfies the first predetermined condition and a state in which the output of the control signal monitoring section satisfies the second predetermined condition.

4. The load control backup signal generating circuit according to claim 1, further comprising:

a clock generating section configured to output clock pulses when a state signal applied to an input of the control processor is active;

a first counter configured to count the clock pulses output from the clock generating section when a level of the control signal output from the control processor is a predetermined level;

a second counter configured to count the clock pulses output from the clock generating section during the time in which the high or low level state of the constant period signal output periodically from the control processor continues; and

a clearing circuit configured to return the state of the backup signal output section to an initial state of the backup signal output section after detecting that both the control signal and the constant period signal are normal.

5. The load control backup signal generating circuit according to claim 2, further comprising:

a signal gate circuit connected between the first input terminal and the input of the constant period signal monitoring section,

wherein the output of the control signal monitoring section is connected to a control input of the signal gate circuit.

6. The load control backup signal generating circuit according to claim 5, further comprising:

a clearing circuit configured to monitor an output signal of the signal gate circuit and to return the state of the backup signal output section to an initial state of the backup signal output section when detecting that the output signal of the signal gate circuit is normal.

7. The load control backup signal generating circuit according to claim 6, further comprising:

a clock generating section configured to output clock pulses when the state signal applied to the input of the control processor is active; and

a counter configured to count the clock pulses output from the clock generating section during the time in which a high or low level state of the constant period signal appearing at the output of the clock generating section continues.

8. The load control backup signal generating circuit according to claim 7, wherein a DC shut-off capacitor is connected between the output of the signal gate circuit and an input of the counter;

and

wherein the input of the counter is connected to a predetermined potential line via a potential control resistor provided therebetween.

9. The load control backup signal generating circuit according to claim 1, wherein the second input terminal is different from the first input terminal and is attached to an output of a port to which the control processor output the control signal.

10. The load control backup signal generating circuit according to claim 1, wherein the control signal is transmitted in parallel to the second input terminal and to the switch of the load.

11. The load control backup signal generating circuit according to claim 1, wherein the first predetermined time is shorter than the second predetermined time.

12. The load control backup signal generating circuit according to claim 1, wherein the second signal indicates whether an error occurs in transmitting the control signal from the control processor, when the control processor is normal, to the switch of the load.