Semiconductor device with non-uniform trench oxide layer

• US 9,673,314 B2
• Filed: 07/08/2015
• Issued: 06/06/2017
• Est. Priority Date: 07/08/2015
• Status: Active Grant

• Current Assignee: Vishay Siliconix
• Original Assignee: Vishay Siliconix
• Inventors: Park, Chanho, Shibib, Ayman, Terrill, Kyle
• Primary Examiner(s): Nguyen, Dao H
• Application Number:
  US14/794,164
• Publication Number:
  US 20170012118A1
• Time in Patent Office: 699 Days
• Field of Search: 257328, 257329, 257330, 257333, 257E29021, 257E29118, 257E29133, 257E21218, 257E21252, 257E21359, 438259, 438268, 438270
• CPC Class Codes: H01L 29/086 Impurity concentration or distribution
• CPC Class Codes: H01L 29/0865 Disposition
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/36 characterised by the concentration or distribution of impurities in the bulk material within semiconductor regions H01L29/06
• CPC Class Codes: H01L 29/404 Multiple field plate structures
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41741 for vertical or pseudo-vertical devices
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/66712 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/872 Schottky diodes

Abstract

A semiconductor device includes a trench formed in an epitaxial layer and an oxide layer that lines the sidewalls of the trench. The thickness of the oxide layer is non-uniform, so that the thickness of the oxide layer toward the top of the trench is thinner than it is toward the bottom of the trench. The epitaxial layer can have a non-uniform dopant concentration, where the dopant concentration varies according to the thickness of the oxide layer.

Claims

1. A semiconductor device, comprising:

a substrate layer;

an epitaxial layer adjacent to the substrate layer;

a first trench structure formed in the epitaxial layer and having a bottom and sidewalls, wherein the first trench structure further comprises filler material in contact with a source electrode; and

an oxide layer that lines the sidewalls, the oxide layer having a non-uniform thickness along the sidewalls, wherein the thickness of the oxide layer at a first distance from the bottom is less than the thickness of the oxide layer at the bottom, and wherein the thickness of the oxide layer at a second distance from the bottom, greater than the first distance, is less than the thickness of the oxide layer at the first distance;

wherein the epitaxial layer has a non-uniform dopant concentration, wherein the non-uniform dopant concentration varies according to the thickness of the oxide layer adjacent thereto.

2. The semiconductor device of claim 1, wherein a region of the epitaxial layer at a depth corresponding to the first distance has a first dopant concentration, and a region of the epitaxial layer at a depth corresponding to the second distance has a second dopant concentration, wherein the first dopant concentration is less than the second dopant concentration.

3. The semiconductor device of claim 1, wherein the thickness of the oxide layer deceases linearly along a length of the sidewalls between the first distance and the second distance.

4. The semiconductor device of claim 1, wherein the oxide layer has a uniform first thickness from above the bottom of the first trench structure to the first distance, and has a uniform second thickness from the first distance to the second distance, the second thickness less than the first thickness.

5. The semiconductor device of claim 1, further comprising a structure formed adjacent to the first trench structure, the structure comprising:

a second trench filled with material, a body region, and a source region.

6. A semiconductor device, comprising:

a substrate layer;

an epitaxial layer adjacent to the substrate layer;

a first trench structure formed in the epitaxial layer, the first trench structure having a bottom, a first sidewall, and a second sidewall, wherein the first trench structure further comprises filler material in contact with a source electrode; and

an oxide layer that lines the bottom and the first and second sidewalls, the oxide layer comprising a first portion that spans the bottom of the first trench structure from the first sidewall to the second sidewall, a second portion extending from the first portion along the first sidewall, and a third portion extending from the second portion along the first sidewall, wherein the oxide layer has a first thickness in the second portion and a second thickness in the third portion, the second thickness less than the first thickness;

wherein the epitaxial layer comprises a first region neighboring the first portion of the oxide layer, a second region neighboring the second portion of the oxide layer, and a third region neighboring the third portion of the oxide layer, wherein the first region has a first dopant concentration, the second region has a second dopant concentration, and the third region has a third dopant concentration, and wherein the third dopant concentration is greater than the second dopant concentration, and the second dopant concentration is greater than the first dopant concentration.

7. The semiconductor device of claim 6, wherein the first thickness decreases linearly as distance from the bottom increases, and wherein the second thickness decreases linearly as distance from the bottom increases.

8. The semiconductor device of claim 6, wherein the first thickness is uniform in the second portion of the oxide layer, and wherein the second thickness is uniform in the third portion of the oxide layer, the second thickness less than the first thickness.

9. The semiconductor device of claim 6, further comprising a structure formed adjacent to the first trench structure, the structure comprising:

a second trench filled with material, a body region, and a source region.

10. A semiconductor device, comprising:

a substrate layer;

an epitaxial layer adjacent to the substrate layer;

a first trench structure formed in the epitaxial layer and having a bottom and sidewalls, wherein the first trench structure further comprises filler material in contact with a source electrode; and

an oxide layer that lines the sidewalls, the oxide layer having a non-uniform thickness along the sidewalls, wherein the thickness of the oxide layer at a first distance from the bottom is less than the thickness of the oxide layer at the bottom, and wherein the thickness of the oxide layer at a second distance from the bottom, greater than the first distance, is less than the thickness of the oxide layer at the first distance

wherein a region of the epitaxial layer at a depth corresponding to the first distance has a first dopant concentration, and a region of the epitaxial layer at a depth corresponding to the second distance has a second dopant concentration, and wherein the first dopant concentration is less than the second dopant concentration.

11. The semiconductor device of claim 10, wherein the thickness of the oxide layer deceases linearly along a length of the sidewalls between the first distance and the second distance.

12. The semiconductor device of claim 10, wherein the oxide layer has a uniform first thickness from above the bottom of the first trench structure to the first distance, and has a uniform second thickness from the first distance to the second distance, the second thickness less than the first thickness.

13. The semiconductor device of claim 10, further comprising a structure formed adjacent to the first trench structure, the structure comprising:

a second trench filled with material, a body region, and a source region.