High power FET switch
First Claim
1. A stacked field effect transistor (FET) switch for a time-variant input signal, the stacked FET switch comprising:
- a FET device stack operable in an open state and in a closed state, the FET device stack comprising a plurality of FET devices coupled in series to form the FET device stack;
each of the plurality of FET devices having a gate contact, a drain contact, and a source contact, the plurality of FET devices including a first FET device wherein either the drain contact or the source contact of the first FET device is at a first end of the FET device stack;
a first decoupling path configured to pass the time-variant input signal during the open state of the FET device stack, the first decoupling path being connected to the FET device stack such that a voltage drop of the time-variant input signal bypasses the FET device stack from the drain contact of the first FET device to the source contact of the first FET device during the open state of the FET device stack.
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Accused Products
Abstract
Described are embodiments of stacked field effect transistor (FET) switch having a plurality of FET devices coupled in series to form an FET device stack. To prevent the FET device stack from being turned on during large signal conditions, one or more decoupling paths are provided and are configured to pass the time-variant input signal during the open state of the FET device stack. The first decoupling path may include a capacitor, a transistor, or the like, that passes the time-variant input signal by, for example, presenting a low impedance to the time-variant input signal during the open state. The decoupling paths may be connected so that the time-variant input signal bypasses a portion of the FET device stack during the open state.
21 Citations
24 Claims
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1. A stacked field effect transistor (FET) switch for a time-variant input signal, the stacked FET switch comprising:
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a FET device stack operable in an open state and in a closed state, the FET device stack comprising a plurality of FET devices coupled in series to form the FET device stack; each of the plurality of FET devices having a gate contact, a drain contact, and a source contact, the plurality of FET devices including a first FET device wherein either the drain contact or the source contact of the first FET device is at a first end of the FET device stack; a first decoupling path configured to pass the time-variant input signal during the open state of the FET device stack, the first decoupling path being connected to the FET device stack such that a voltage drop of the time-variant input signal bypasses the FET device stack from the drain contact of the first FET device to the source contact of the first FET device during the open state of the FET device stack. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 22, 23, 24)
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18. A stacked field effect transistor (FET) switch for a time-variant input signal, the stacked FET switch comprising:
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a FET device stack operable in an open state and in a closed state, the FET device stack comprising a plurality of FET devices coupled in series to form the FET device stack, each of the plurality of FET devices having a gate contact, a drain contact, and a source contact and the FET device stack having at least a first end FET device, a second end FET device, and one or more middle FET devices connected between the first end FET device and the second end FET device, wherein the drain contact of the first end FET device is at a first end of the FET device stack and the source contact of the second end FET device is at a second end of the FET device stack; and a first decoupling path configured to pass the time-variant input signal during the open state of the FET device stack, the first decoupling path being connected to the FET device stack such that a voltage drop of the time-variant input signal bypasses the FET device stack from the drain contact of one of the end FET devices to the source contact of the one of the end FET devices, during the open state of the FET device stack. - View Dependent Claims (19, 20, 21)
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Specification