×

Semiconductor device and method of forming cavity adjacent to sensitive region of semiconductor die using wafer-level underfill material

  • US 9,679,881 B2
  • Filed: 09/09/2013
  • Issued: 06/13/2017
  • Est. Priority Date: 02/03/2010
  • Status: Active Grant
First Claim
Patent Images

1. A method of making a semiconductor device, comprising:

  • providing a build-up interconnect structure including a plurality of insulating layers interleaved with a plurality of conductive layers;

    disposing a plurality of first conductive bumps on a bottom surface of the build-up interconnect structure;

    disposing a first semiconductor die on a top surface of the build-up interconnect structure with an active surface of the first semiconductor die oriented away from the build-up interconnect structure and an adhesive layer between the build-up interconnect structure and first semiconductor die;

    forming a bond wire extending from a first contact pad on the active surface of the first semiconductor die to the top surface of the build-up interconnect structure;

    disposing a second conductive bump on a second contact pad on the active surface of the first semiconductor die;

    providing a semiconductor wafer including a plurality of second semiconductor die including an active surface of each of the plurality of second semiconductor die comprising a stress sensitive region including a plurality of integrated passive devices (IPDs) for high frequency signal processing;

    depositing an underfill material on the active surfaces of the second semiconductor die while using a mask or screen disposed over the stress sensitive regions of the second semiconductor die to prevent the underfill material from extending onto the stress sensitive regions of the second semiconductor die;

    singulating the semiconductor wafer through the underfill material to separate the second semiconductor die;

    disposing one of the second semiconductor die over the first semiconductor die and build-up interconnect structure with the active surface and stress sensitive region of the second semiconductor die oriented toward the first semiconductor die;

    pressing the second conductive bump on the first semiconductor die into the underfill material on the second semiconductor die to bring the second conductive bump into contact with a third contact pad on the active surface of the second semiconductor die, wherein the underfill material provides an air gap between the first semiconductor die and the stress sensitive region of the second semiconductor die; and

    depositing an encapsulant over the build-up interconnect structure to fully cover the first semiconductor die, second semiconductor die, and bond wire, wherein side surfaces of the encapsulant are coplanar with side surfaces of the build-up interconnect structure.

View all claims
  • 5 Assignments
Timeline View
Assignment View
    ×
    ×