Threshold detection with digital correction in analog to digital converters
First Claim
1. An analog to digital converter (ADC), comprising:
- a comparator;
a plurality of capacitor pairs coupled between a first input and a second input of the comparator, wherein each one of the capacitor pairs corresponds to one of a plurality of cycles used by the ADC to generate a digital value representing a sampled analog voltage;
a voltage detection circuit coupled between the first and second inputs; and
a state machine configured to;
upon determining during a first cycle of the plurality of cycles that the voltage detection circuit indicates the sampled analog voltage across the first and second inputs satisfies a threshold, maintaining a first pair of the plurality of capacitor pairs corresponding to the first cycle in a reset state such that the sampled analog voltage is unchanged; and
upon determining during the first cycle that the voltage detection circuit indicates the sampled analog voltage across the first and second inputs does not satisfy the threshold, switching the first pair of the plurality of capacitor pairs to change the sampled analog voltage.
1 Assignment
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Accused Products
Abstract
An analog to digital converter (ADC) includes a comparator and a plurality of capacitor pairs coupled between first and second inputs the comparator, where each one of the capacitor pairs corresponds to one of a plurality of cycles used by the ADC to generate a digital value representing a sampled analog voltage. The ADC also includes a voltage detection circuit and a state machine that is configured to, upon determining during a first cycle that the sampled voltage across the first and second inputs satisfies a threshold, maintaining a first pair of the plurality of capacitor pairs in a default state such that the sampled analog voltage is unchanged. Otherwise, the state machine is configured to switch the first pair of the plurality of capacitor pairs to change the sampled analog voltage.
20 Citations
20 Claims
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1. An analog to digital converter (ADC), comprising:
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a comparator; a plurality of capacitor pairs coupled between a first input and a second input of the comparator, wherein each one of the capacitor pairs corresponds to one of a plurality of cycles used by the ADC to generate a digital value representing a sampled analog voltage; a voltage detection circuit coupled between the first and second inputs; and a state machine configured to; upon determining during a first cycle of the plurality of cycles that the voltage detection circuit indicates the sampled analog voltage across the first and second inputs satisfies a threshold, maintaining a first pair of the plurality of capacitor pairs corresponding to the first cycle in a reset state such that the sampled analog voltage is unchanged; and upon determining during the first cycle that the voltage detection circuit indicates the sampled analog voltage across the first and second inputs does not satisfy the threshold, switching the first pair of the plurality of capacitor pairs to change the sampled analog voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. An integrated circuit, comprising:
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a comparator; a plurality of capacitor pairs coupled between a first input and a second input of the comparator, wherein each one of the capacitor pairs corresponds to one of a plurality of cycles used to generate a digital value representing a sampled analog voltage; a voltage detection circuit coupled between the first and second inputs; and a state machine configured to; upon determining during a first cycle of the plurality of cycles that the voltage detection circuit indicates the sampled analog voltage across the first and second inputs satisfies a threshold, maintaining a first pair of the plurality of capacitor pairs corresponding to the first cycle in a reset state such that the sampled analog voltage is unchanged; and upon determining during the first cycle that the voltage detection circuit indicates the sampled analog voltage across the first and second inputs does not satisfy the threshold, switch the first pair of the plurality of capacitor pairs to change the sampled analog voltage. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A method, comprising:
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receiving a first sampled analog voltage at a first input and a second input of a comparator in an ADC, wherein a plurality of capacitor pairs are coupled between the first and second inputs of the comparator, and wherein each one of the capacitor pairs corresponds to one of a first plurality of cycles used by the ADC to generate a digital value representing the first sampled analog voltage; upon determining during a first cycle of the first plurality of cycles that the first sampled analog voltage satisfies a threshold, maintaining a first pair of the plurality of capacitor pairs corresponding to the first cycle in a reset state such that the first sampled analog voltage is unchanged; receiving a second sampled analog voltage at the first and second inputs of the comparator; and upon determining during a first cycle of a second plurality of cycles that the second sampled analog voltage does not satisfy the threshold, switching the first pair of the plurality of capacitor pairs to change the second sampled analog voltage. - View Dependent Claims (18, 19, 20)
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Specification