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Trusted threat-aware microvisor

  • US 9,680,862 B2
  • Filed: 01/21/2015
  • Issued: 06/13/2017
  • Est. Priority Date: 07/01/2014
  • Status: Active Grant
First Claim
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1. A system comprising:

  • a central processing unit (CPU) adapted to execute a module, a virtual machine monitor (VMM), and a trusted microvisor; and

    a memory configured to store the trusted microvisor as a trusted computing base (TCB), the trusted microvisor configured to enforce a first security property that prevents alteration of a first state related to the first security property of the trusted microvisor by the module, wherein trustedness of the trusted microvisor provides a predetermined level of confidence that the first security property is implemented by the trusted microvisor, and wherein the trusted microvisor is configured to generate a capability violation in response to the module issuing a first instruction having an argument configured to alter the first state related to the first security property of the trusted microvisor such that the first instruction is prevented from execution by the trusted microvisor, the memory further storing the VMM that, in response to determining that the first instruction is suspicious, is configured to spawn a micro virtual machine (micro-VM) that executes the first instruction, the micro-VM configured to i) monitor a second instruction that attempts to alter a second state related to the first security property of the trusted microvisor and ii) support a determination of whether the module is malicious.

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