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Computing system with non-disruptive fast memory restore mechanism and method of operation thereof

  • US 9,684,520 B2
  • Filed: 10/20/2011
  • Issued: 06/20/2017
  • Est. Priority Date: 10/20/2011
  • Status: Active Grant
First Claim
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1. A method for operating a computing system comprising:

  • monitoring a central interface for a power event, wherein monitoring the central interface includes detecting a power-on sequence during system initialization;

    training a high-speed volatile memory during the system initialization to determine a fastest write speed of the high-speed volatile memory by performing a series of write and read operations to and from the high-speed volatile memory at predetermined rates and increasing in write speed;

    accessing a non-volatile memory during the power event for pre-shutdown data previously stored on the high-speed volatile memory;

    selecting a multiplexer for allowing external access to the high-speed volatile memory;

    formatting the pre-shutdown data in the non-volatile memory for access through a non-disruptive interface, wherein formatting the pre-shutdown data includes formatting the pre-shutdown data after detecting the power-on sequence; and

    transferring the pre-shutdown data from the non-volatile memory to the high-speed volatile memory after the high-speed volatile memory training is finished, the non-volatile memory accessed through the non-disruptive interface, the high-speed volatile memory accessed through an access controller, and the high-speed volatile memory configured for the fastest write speed.

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